公开(公告)号：US20210091104A1

公开(公告)日：2021-03-25

申请号：US16874159

申请日：2020-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： SANGHOON JEONG ,  SANGJUN HONG ,  SUNIL SHIM ,  KYUNGHYUN KIM ,  CHANGSUP MUN

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/02

Abstract: A semiconductor memory device includes a stack structure comprising horizontal electrodes sequentially stacked on a substrate including a cell array region and an extension region and horizontal insulating layers between the horizontal electrodes. The semiconductor memory device may further include vertical structures that penetrate the stack structure, a first one of the vertical structures being on the cell array region and a second one of the vertical structures being on the extension region. Each of the vertical structures includes a channel layer, and a tunneling insulating layer, a charge storage layer and a blocking insulating layer which are sequentially stacked on a sidewall of the channel layer. The charge storage layer of the first vertical structure includes charge storage patterns spaced apart from each other in a direction perpendicular to a top surface of the substrate with the horizontal insulating layers interposed therebetween. The charge storage layer of the second vertical structure extends along sidewalls of the horizontal electrodes and sidewalls of the horizontal insulating layers.