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1.
公开(公告)号:US20170344307A1
公开(公告)日:2017-11-30
申请号:US15405227
申请日:2017-01-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Narges SHAHIDI , Manu AWASTHI , Tameesh SURI , Vijay BALAKRISHNAN
IPC: G06F3/06
Abstract: According to one general aspect, an apparatus may include a memory, an erasure-based, non-volatile memory, and a processor. The memory may be configured to store a mapping table, wherein the mapping table indicates a rewriteable state of a plurality of memory addresses. The erasure-based, non-volatile memory may be configured to store information, at respective memory addresses, in an encoded format. The encoded format may include more bits than the unencoded version of the information and the encoded format may allow the information be over-written, at least once, without an intervening erase operation. The processor may be configured to perform garbage collection based, at least in part upon, the rewriteable state associated with the respective memory addresses.
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2.
公开(公告)号:US20200278805A1
公开(公告)日:2020-09-03
申请号:US16875986
申请日:2020-05-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Narges SHAHIDI , Manu AWASTHI , Tameesh SURI , Vijay BALAKRISHNAN
IPC: G06F3/06
Abstract: According to one general aspect, an apparatus may include a memory, an erasure-based, non-volatile memory, and a processor. The memory may be configured to store a mapping table, wherein the mapping table indicates a rewriteable state of a plurality of memory addresses. The erasure-based, non-volatile memory may be configured to store information, at respective memory addresses, in an encoded format. The encoded format may include more bits than the unencoded version of the information and the encoded format may allow the information be over-written, at least once, without an intervening erase operation. The processor may be configured to perform garbage collection based, at least in part upon, the rewriteable state associated with the respective memory addresses.
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3.
公开(公告)号:US20170344487A1
公开(公告)日:2017-11-30
申请号:US15217964
申请日:2016-07-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Narges SHAHIDI , Tameesh SURI , Manu AWASTHI , Vijay BALAKRISHNAN
IPC: G06F12/10
Abstract: According to one general aspect, an apparatus may include a host interface, a memory, a processor, and an erasure-based, non-volatile memory. The host interface may receive a write command, wherein the write command includes unencoded data. The memory may store a mapping table, wherein the mapping table indicates a rewriteable state of a plurality of memory addresses. The processor may select a memory address to store information included by the unencoded data based, at least in part, upon the rewriteable state of the memory address. The erasure-based, non-volatile memory may store, at the memory address, the unencoded data's information as encoded data, wherein the encoded data includes more bits than the unencoded data and wherein the encoded data can be over-written with a second unencoded data without an intervening erase operation.
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