公开(公告)号：US20240340025A1

公开(公告)日：2024-10-10

申请号：US18520707

申请日：2023-11-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kijun JEON ,  Kyoungbin PARK ,  Hong Rak SON ,  Dae-Yeol YANG ,  Geunyeong YU ,  Bohwan JUN ,  Youngjun HWANG

IPC: H03M13/11 ,  H03M13/00

CPC classification number: H03M13/1168 ,  H03M13/616

Abstract: A semiconductor device may include an error correcting code (ECC) encoder that encodes a codeword based on a parity check matrix and generates the encoded codeword including an information bit and a parity bit. The parity check matrix is divided into an information part corresponding to the information bit and a parity part corresponding to the parity bit. The parity part includes a block matrix T including a plurality of first sub-matrices arranged in a dual diagonal structure, a block matrix B including a first sub-matrix and a (1−a)-th sub-matrix, a block matrix D composed of a first sub-matrix, and a block matrix E including a first sub-matrix and a masked (1−(a+1))-th sub-matrix. A location where the first sub-matrix is placed in the block matrix B precedes a location where the masked (1−(a+1))-th sub-matrix is placed in the block matrix E.