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公开(公告)号:US11848285B2
公开(公告)日:2023-12-19
申请号:US17671818
申请日:2022-02-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kwangwuk Park , Youngmin Lee , Inyoung Lee , Sungdong Cho
IPC: H01L23/58 , H01L25/065 , H01L23/522
CPC classification number: H01L23/585 , H01L23/5226 , H01L25/0657
Abstract: A semiconductor chip, a semiconductor package including the same, and a method of fabricating the same, the semiconductor chip including a substrate that includes a device region and an edge region; a device layer and a wiring layer that are sequentially stacked on the substrate; a subsidiary pattern on the wiring layer on the edge region; a first capping layer that covers a sidewall of the subsidiary pattern, a top surface of the wiring layer, and a sidewall of the wiring layer, the first capping layer including an upper outer sidewall and a lower outer sidewall, the lower outer sidewall being offset from the upper outer sidewall; and a buried dielectric pattern in contact with the lower outer sidewall of the first capping layer and spaced apart from the upper outer sidewall of the first capping layer.
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公开(公告)号:US11791242B2
公开(公告)日:2023-10-17
申请号:US17371602
申请日:2021-07-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwangwuk Park , Youngmin Lee , Hyoungyol Mun , Inyoung Lee , Seokhwan Jeong , Sungdong Cho
IPC: H01L23/48 , H01L21/768 , H01L23/528 , H01L25/065 , H01L23/00
CPC classification number: H01L23/481 , H01L21/76898 , H01L23/5283 , H01L23/5286 , H01L25/0657 , H01L2225/06513 , H01L2225/06544 , H01L2225/06586
Abstract: A semiconductor device, includes: a substrate having a first surface on which a plurality of devices are disposed and a second surface, opposite to the first surface; an interlayer insulating film on the first surface of the substrate; an etching delay layer disposed in a region between the substrate and the interlayer insulating film; first and second landing pads on the interlayer insulating film; a first through electrode penetrating through the substrate and the interlayer insulating film; and a second through electrode penetrating the substrate, the etching delay layer, and the interlayer insulating film, the second through electrode having a width, greater than that of the first through electrode, wherein each of the first and second through electrodes includes first and second tapered end portions in the interlayer insulating film, each of first and second tapered end portions having a cross-sectional shape narrowing closer to the landing pads.
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公开(公告)号:US11749614B2
公开(公告)日:2023-09-05
申请号:US17340445
申请日:2021-06-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yongyeop Kim , Seil Oh , Eunji Kim , Kwangwuk Park , Jihak Yu
IPC: H01L23/544 , H01L25/065 , H01L23/48
CPC classification number: H01L23/544 , H01L23/481 , H01L25/0657 , H01L2223/54426 , H01L2225/06513 , H01L2225/06541 , H01L2225/06586 , H01L2225/06593
Abstract: A through-silicon via (TSV) key for overlay measurement includes: a first TSV extending through at least a portion of a substrate in a first direction that is perpendicular to a top surface of the substrate; and at least one ring pattern, which is apart from and surrounds the first TSV in a second direction that is parallel to the top surface of the substrate, the at least one ring pattern being arranged in a layer that is lower than a top surface of the first TSV in the first direction, wherein an inner measurement point corresponds to the first TSV, an outer measurement point corresponds to the at least one ring pattern, and the inner measurement point and the outer measurement point are arranged to provide an overlay measurement of a TSV.
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公开(公告)号:US11798866B2
公开(公告)日:2023-10-24
申请号:US17808533
申请日:2022-06-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eunji Kim , Sungdong Cho , Kwangwuk Park , Sangjun Park , Daesuk Lee , Hakseung Lee
IPC: H01L23/48 , H01L21/768 , H01L25/18 , H01L23/528 , H01L23/498 , H01L21/3065
CPC classification number: H01L23/481 , H01L21/76898 , H01L25/18 , H01L21/3065
Abstract: A semiconductor device includes a semiconductor substrate having an active surface on which semiconductor elements are provided. An interlayer insulating film is provided on the semiconductor substrate. A first via structure passes through the semiconductor substrate. The first via structure has a first diameter. A second via structure passes through the semiconductor substrate. The second via structure has a second diameter that is greater than the first diameter. The first via structure has a step portion that is in contact with the interlayer insulating film.
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公开(公告)号:US11735498B2
公开(公告)日:2023-08-22
申请号:US17213767
申请日:2021-03-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwangwuk Park , Youngmin Lee , Sungdong Cho , Eunji Kim , Hyoungyol Mun , Seokhwan Jeong
IPC: H01L23/48 , H01L21/762 , H01L25/065 , H01L21/768
CPC classification number: H01L23/481 , H01L21/76232
Abstract: A semiconductor includes a substrate having a first surface and a second surface opposite to each other, the substrate having a via hole extending in a thickness direction from the first surface, a circuit pattern in the first surface of the substrate, a through electrode structure in the via hole, a device isolation structure in a first trench extending in one direction in the first surface of the substrate, the device isolation structure between the via hole and the circuit pattern, the device isolation structure including a first oxide layer pattern and a first nitride layer pattern sequentially stacked on an inner surface of the first trench, the first nitride layer pattern filling the first trench, and an insulation interlayer on the first surface of the substrate and covering the circuit pattern.
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公开(公告)号:US11380606B2
公开(公告)日:2022-07-05
申请号:US16932726
申请日:2020-07-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eunji Kim , Sungdong Cho , Kwangwuk Park , Sangjun Park , Daesuk Lee , Hakseung Lee
IPC: H01L23/48 , H01L21/768 , H01L25/18 , H01L23/528 , H01L23/498 , H01L23/522 , H01L21/3065
Abstract: A semiconductor device includes a semiconductor substrate having an active surface on which semiconductor elements are provided. An interlayer insulating film is provided on the semiconductor substrate. A first via structure passes through the semiconductor substrate. The first via structure has a first diameter. A second via structure passes through the semiconductor substrate. The second via structure has a second diameter that is greater than the first diameter. The first via structure has a step portion that is in contact with the interlayer insulating film.
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