公开(公告)号：US20250169187A1

公开(公告)日：2025-05-22

申请号：US18753484

申请日：2024-06-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongsoon PARK ,  Gunpil HWANG ,  Hyonwook RA ,  Keunhee BAI ,  Jinwook LEE ,  Sangho CHEON

IPC: H01L27/02 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device may include a device isolation layer on a substrate and defining active regions extending a first direction; gate structures intersecting the active regions and extending in a second direction; channel layers spaced apart from each other on the active regions and surrounded by the gate structures; and source/drain regions connected to the channel layers and in recessed regions of the active regions on both sides of the gate structures. First and second regions of the substrate respectively may be spaced apart by a first length and the second length from first ends of the gate structures in the second direction. The second length may be longer than the first length. An upper surface of the device isolation layer may have recessed portion on the first region of the substrate and a flat upper surface on the second region of the substrate.