公开(公告)号：US20230027640A1

公开(公告)日：2023-01-26

申请号：US17699496

申请日：2022-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin BAEK ,  Junghoo SHIN ,  Sangshin JANG ,  Junghwan CHUN ,  Kyeongbeom PARK ,  Suhyun BARK

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a substrate having an active region, a first insulating layer on the substrate, a second insulating layer on the first insulating layer, an etch stop layer between the first insulating layer and the second insulating layer, a via contact in the first insulating layer and electrically connected to the active region, an interconnection electrode in the second insulating layer and electrically connected to the via contact, a conductive barrier layer on a side surface and a lower surface of the interconnection electrode and having an extension portion extending to a partial region of a side surface of the via contact, and a side insulating layer on a side region of the via contact below the extension portion of the conductive barrier layer, the side insulating layer including the same material as a material of the etch stop layer.

公开(公告)号：US20240258204A1

公开(公告)日：2024-08-01

申请号：US18486853

申请日：2023-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yeonggil KIM ,  Hoonseok SEO ,  Minchul AHN ,  Wookyung YOU ,  Woojin LEE ,  Junghwan CHUN

IPC: H01L23/48 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device comprising: a substrate including an active region extending in a first direction; a gate structure extending in a second direction on the active region; source/drain regions on the active region and adjacent the gate structure; a backside insulating layer on a lower surface of the substrate; a vertical power structure between adjacent source/drain regions, wherein the vertical power structure extends through the substrate and the backside insulating layer and has an exposed lower surface exposed; an interlayer insulating layer on the backside insulating layer; a backside power structure that extends through the interlayer insulating layer and is connected to the vertical power structure; and a first alignment insulating layer between the backside insulating layer and the interlayer insulating layer, wherein the first alignment insulating layer has a first opening exposing the lower surface of the vertical power structure and contacts the backside power structure.

公开(公告)号：US20230036104A1

公开(公告)日：2023-02-02

申请号：US17712319

申请日：2022-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bongkwan BAEK ,  Junghwan CHUN ,  Jongmin BAEK ,  Koungmin RYU

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device includes a gate structure disposed on a substrate; a source and drain layer disposed on the substrate adjacent the gate structure; a first contact plug disposed on the source and drain layer; an insulation pattern structure disposed on the first contact plug, the insulation pattern structure including insulation patterns having different carbon concentrations; and a second contact plug disposed on the gate structure.