公开(公告)号：US20230042905A1

公开(公告)日：2023-02-09

申请号：US17704465

申请日：2022-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongchul JEONG ,  Sangjin KIM ,  Yigwon KIM ,  Kyeongbeom PARK ,  Suhyun BARK ,  Sangshin JANG ,  Jinhee JANG ,  Cheolin JANG ,  Tae Min CHOI

IPC: H01L21/768 ,  H01L21/027 ,  H01L21/311

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an etch-target layer, a mask layer, a blocking layer, and a photoresist layer, which are sequentially stacked on a substrate; forming a photoresist pattern, the forming the photoresist pattern including irradiating the photoresist layer with extreme ultraviolet (EUV) light; forming a mask layer, the forming the mask layer including etching the mask layer using the photoresist pattern as an etch mask; and forming a target pattern, the forming the target pattern including etching the etch-target layer using the mask pattern as an etch mask. The photoresist layer may include an organic metal oxide. The blocking layer may be a non-polar layer and may limit and/or prevent a metallic element in the photoresist layer from infiltrating into the mask layer.

公开(公告)号：US20230027640A1

公开(公告)日：2023-01-26

申请号：US17699496

申请日：2022-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin BAEK ,  Junghoo SHIN ,  Sangshin JANG ,  Junghwan CHUN ,  Kyeongbeom PARK ,  Suhyun BARK

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a substrate having an active region, a first insulating layer on the substrate, a second insulating layer on the first insulating layer, an etch stop layer between the first insulating layer and the second insulating layer, a via contact in the first insulating layer and electrically connected to the active region, an interconnection electrode in the second insulating layer and electrically connected to the via contact, a conductive barrier layer on a side surface and a lower surface of the interconnection electrode and having an extension portion extending to a partial region of a side surface of the via contact, and a side insulating layer on a side region of the via contact below the extension portion of the conductive barrier layer, the side insulating layer including the same material as a material of the etch stop layer.