公开(公告)号：US20150067392A1

公开(公告)日：2015-03-05

申请号：US14313004

申请日：2014-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-pil LIM ,  Dong-Myung LEE

IPC: G06F11/07 ,  G06F1/12

CPC classification number: G06F1/12 ,  G09G3/20 ,  G09G5/008 ,  G09G2310/027 ,  G09G2330/06 ,  G09G2330/12 ,  G09G2370/08

Abstract: A clock data recovery device includes a clock recovery device for separating a recovery clock signal and a data signal from an input signal and generating a clock fail signal in response to noise of the input signal; a clock generator for receiving a control voltage to generate one or more delay clock signals, delaying the recovery clock signal to generate the delay clock signals in a first mode, delaying the generated delay clock signal to generate the delay clock signal in a second mode, and switching the first mode to the second mode in response to the clock fail signal; and a phase frequency detector for comparing at least one of the delay clock signals with the recovery clock signal to generate a voltage adjusting signal; and a control voltage generator for receiving the voltage adjusting signal to generate the control voltage.

Abstract translation: 时钟数据恢复装置包括：时钟恢复装置，用于响应于输入信号的噪声，从输入信号中分离恢复时钟信号和数据信号，并产生时钟失败信号; 时钟发生器，用于接收控制电压以产生一个或多个延迟时钟信号，延迟恢复时钟信号以第一模式产生延迟时钟信号，延迟产生的延迟时钟信号以在第二模式中产生延迟时钟信号， 以及响应于所述时钟故障信号将所述第一模式切换到所述第二模式; 以及相位频率检测器，用于将延迟时钟信号中的至少一个与恢复时钟信号进行比较，以产生电压调整信号; 以及用于接收电压调节信号以产生控制电压的控制电压发生器。