公开(公告)号：US20240145268A1

公开(公告)日：2024-05-02

申请号：US18468192

申请日：2023-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Woo Park ,  Gyu Hyeong Kim ,  Seung Hwan Kim ,  Jung Joo Kim ,  Jong Wan Kim ,  Yong Kwan Lee

IPC: H01L21/67 ,  H01L21/56 ,  H01L21/68

CPC classification number: H01L21/67126 ,  H01L21/565 ,  H01L21/67017 ,  H01L21/68

Abstract: A molding apparatus for fabricating a semiconductor package includes an upper mold including an upper cavity, a first side cavity at a first side of the upper cavity, a second side cavity formed at an opposite second side of the upper cavity, and a first driving part connected to the first side cavity and configured to move the first side cavity in a first direction, and a bottom mold including a bottom cavity configured to receive a molding target including a package substrate and at least one semiconductor chip. A width in the first direction between the first side cavity and the second side cavity may be smaller than a width of the package substrate in the first direction and greater than a width in the first direction between a first boundary and a second boundary of the at least one semiconductor chip.

公开(公告)号：US11450614B2

公开(公告)日：2022-09-20

申请号：US17035000

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Joo Kim ,  Sun Chul Kim ,  Min Keun Kwak ,  Hyun Ki Kim ,  Hyung Gil Baek ,  Yong Kwan Lee

IPC: H01L23/48 ,  H01L23/538 ,  H01L25/10 ,  H01L25/18 ,  H01L21/48 ,  H01L23/498

Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.

公开(公告)号：US11862570B2

公开(公告)日：2024-01-02

申请号：US17891190

申请日：2022-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Joo Kim ,  Sun Chul Kim ,  Min Keun Kwak ,  Hyun Ki Kim ,  Hyung Gil Baek ,  Yong Kwan Lee

IPC: H01L23/48 ,  H01L23/538 ,  H01L25/10 ,  H01L25/18 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/5385 ,  H01L21/4846 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/18 ,  H01L23/49827 ,  H01L2225/107 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.