IMAGE SENSOR
    1.
    发明公开
    IMAGE SENSOR 审中-公开

    公开(公告)号:US20240120357A1

    公开(公告)日:2024-04-11

    申请号:US18207786

    申请日:2023-06-09

    Abstract: An image sensor includes a substrate having a plurality of first pixel regions configured to generate image information and a plurality of second pixel regions configured to detect phase information, a grid pattern on the substrate and dividing a plurality of spaces corresponding to each of the plurality of first pixel regions and the plurality of second pixel regions. The image sensor also includes a plurality of color filters respectively in first spaces of the plurality of spaces, excluding second spaces corresponding to the plurality of second pixel regions, a plurality of polarization patterns respectively in the second spaces and partitioning the second spaces, and a microlens layer including a plurality of first microlenses respectively on the plurality of color filters.

    IMAGE SENSOR
    2.
    发明申请

    公开(公告)号:US20220165763A1

    公开(公告)日:2022-05-26

    申请号:US17534706

    申请日:2021-11-24

    Abstract: An image sensor includes a first pixel; a second pixel disposed adjacent to the first pixel; a pixel isolation structure disposed between the first pixel and the second pixel; a rear side anti-reflective layer disposed on the first pixel, the second pixel, and the pixel isolation structure; and a fence disposed on the rear side anti-reflective layer aligning with the pixel isolation structure and including a buried air gap.

    METHOD OF FABRICATING SEMICONDUCTOR DEVICES USING A TWO-STEP GAP-FILL PROCESS

    公开(公告)号:US20210050522A1

    公开(公告)日:2021-02-18

    申请号:US16746258

    申请日:2020-01-17

    Abstract: A method of fabricating a memory device includes forming word lines and cell stacks with gaps between the cell stacks, forming a lower gap-fill insulator in the gaps, forming an upper gap-fill insulator on the lower gap-fill insulator, curing the lower gap-fill insulator and the upper gap-fill insulator to form a gap-fill insulator, and forming bit lines on the cell stacks and the gap-fill insulator. The lower gap-fill process may be performed using a first source gas that includes first and second precursors, and the upper gap-fill process may be performed using a second source gas that includes the first and second precursors, a volume ratio of the first precursor to the second precursor in the first source gas may be greater than 15:1, and a volume ratio of the first precursor to the second precursor in the second source gas may be less than 15:1.

    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

    公开(公告)号:US20210151506A1

    公开(公告)日:2021-05-20

    申请号:US17032571

    申请日:2020-09-25

    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device including a first conductive line on a substrate, memory cell structures stacked on the first conductive line, a second conductive line between the memory cell structures; and a third conductive line on the memory cell structures may be provided. Each of the plurality of memory cell structures includes a data storage material pattern, a switching material pattern, and a plurality of electrode patterns, at least one of the electrode patterns includes at least one of carbon material layer or a carbon-containing material layer, and the at least one of the electrode patterns includes a first region doped with a nitrogen and a second region that is not doped with the nitrogen, or is doped with the nitrogen at a first concentration lower than a second concentration of the nitrogen in the first region.

    VARIABLE RESISTANCE MEMORY DEVICE

    公开(公告)号:US20210104671A1

    公开(公告)日:2021-04-08

    申请号:US16741936

    申请日:2020-01-14

    Abstract: A semiconductor device includes a plurality of first conductive lines disposed on a substrate, a plurality of second conductive lines intersecting the plurality of first conductive lines, and a plurality of cell structures interposed between the plurality of first conductive lines and the plurality of second conductive lines. At least one among the plurality of cell structures includes a first electrode, a switching element disposed on the first electrode, a second electrode disposed on the switching element, a first metal pattern disposed on the second electrode, a variable resistance pattern interposed between the first metal pattern and at least one among the plurality of second conductive lines, and a first spacer disposed on a sidewall of the variable resistance pattern, a sidewall of the first metal pattern and a sidewall of the second electrode.

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