公开(公告)号：US20180060194A1

公开(公告)日：2018-03-01

申请号：US15596540

申请日：2017-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ye-Sin RYU ,  Jong-Wook PARK ,  Youn-Hyung KANG

IPC: G06F11/16 ,  G06F11/10 ,  G06F3/06

CPC classification number: G06F11/1666 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/10 ,  G06F11/1048 ,  G06F11/108 ,  G06F2201/805 ,  G11C29/52 ,  G11C2029/0411

Abstract: A method of operating a semiconductor memory device including a memory cell array and an error correction code (ECC) engine, wherein the memory cell array includes a plurality of memory cells and the ECC engine is configured to perform an error correction operation on data of the memory cell array, may include storing, in a nonvolatile storage, a mapping information indicating physical addresses of normal cells to swap with a portion of fail cells when a first unit of memory cells includes a number of the fail cells exceeding an error correction capability of the ECC engine. The first unit of memory cells of the memory cells may be accessed based on a logical address. The method may include performing a memory operation on the memory cell array selectively based on the mapping information.