公开(公告)号：US20190385915A1

公开(公告)日：2019-12-19

申请号：US16249353

申请日：2019-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngmin PARK ,  Kyoung Hwan YEO ,  Jong Mil YOUN ,  Hwasung RHEE

IPC: H01L21/8238 ,  H01L27/092

Abstract: A semiconductor device includes a substrate including at least a first region, first active patterns and a first dummy pattern which vertically protrude from the first region, a device isolation layer filling a first trench, a second trench and a third trench of the substrate, and a gate electrode intersecting the first active patterns. The first trench defines the first active patterns on the first region, the second trench defines a first sidewall of the first region, and the third trench defines a second sidewall of the first region, which is opposite to the first sidewall. A sidewall of the first dummy pattern is aligned with the second sidewall of the first region, and a level of a top of the second sidewall of the first region is higher than a level of a top of the first sidewall of the first region.

公开(公告)号：US20220077292A1

公开(公告)日：2022-03-10

申请号：US17227848

申请日：2021-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Deok Han BAE ,  Sung Min KIM ,  Ju Hun PARK ,  Myung Yoon UM ,  Jong Mil YOUN

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06 ,  H01L29/40

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.