公开(公告)号：US09330931B2

公开(公告)日：2016-05-03

申请号：US14568764

申请日：2014-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-sung Song ,  Jin-hyun Shin ,  Jae-hwang Sim ,  Joon-sung Lim ,  Bong-hyun Choi

IPC: H01L21/308 ,  H01L21/768 ,  H01L21/033

CPC classification number: H01L21/3086 ,  H01L21/0334 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/76224 ,  H01L21/768

Abstract: In a method of manufacturing a semiconductor device, which uses a triple patterning process, a porous layer covering sidewalls and an upper surface of a polymer-containing pattern is formed on a layer to be etched. A decomposition gas is supplied to the polymer-containing pattern through the porous layer, and a portion of the polymer-containing pattern is decomposed to form a reduced polymer-containing pattern and form a void between the reduced polymer-containing pattern and the porous layer. A portion of the porous layer is removed to form a porous spacer pattern spaced apart from the reduced polymer-containing pattern. The layer to be etched is etched by using the reduced polymer-containing pattern and the porous spacer pattern as an etch mask.

Abstract translation: 在使用三重图案化工艺的半导体器件的制造方法中，在要蚀刻的层上形成覆盖侧壁的多孔层和含聚合物的图案的上表面。 通过多孔层将分解气体供给到含聚合物的图案，并且含有聚合物的图案的一部分被分解以形成还原的含聚合物的图案，并且在含还原聚合物的图案和多孔层之间形成空隙 。 去除多孔层的一部分以形成与含还原聚合物的图案间隔开的多孔间隔物图案。 通过使用还原的含聚合物图案和多孔间隔物图案作为蚀刻掩模来蚀刻待蚀刻的层。

公开(公告)号：US10600805B2

公开(公告)日：2020-03-24

申请号：US16157684

申请日：2018-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joo-Hee Park ,  Jong-Min Lee ,  Seon-Kyung Kim ,  Kee-Jeong Rho ,  Jin-hyun Shin ,  Jong-Hyun Park ,  Jin-Yeon Won

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

Abstract: A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that vertical to a top surface of the substrate, a plurality of gate lines and a conductive line on the substrate. The gate lines are stacked on top of each other. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction. The conductive line cuts the gate lines along the first direction. A width of the conductive line is periodically and repeatedly changed.

公开(公告)号：US20150348795A1

公开(公告)日：2015-12-03

申请号：US14568764

申请日：2014-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-sung Song ,  Jin-hyun Shin ,  Jae-hwang Sim ,  Joon-sung Lim ,  Bong-hyun Choi

IPC: H01L21/308 ,  H01L21/768

CPC classification number: H01L21/3086 ,  H01L21/0334 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/76224 ,  H01L21/768

Abstract: In a method of manufacturing a semiconductor device, which uses a triple patterning process, a porous layer covering sidewalls and an upper surface of a polymer-containing pattern is formed on a layer to be etched. A decomposition gas is supplied to the polymer-containing pattern through the porous layer, and a portion of the polymer-containing pattern is decomposed to form a reduced polymer-containing pattern and form a void between the reduced polymer-containing pattern and the porous layer. A portion of the porous layer is removed to form a porous spacer pattern spaced apart from the reduced polymer-containing pattern. The layer to be etched is etched by using the reduced polymer-containing pattern and the porous spacer pattern as an etch mask.

Abstract translation: 在使用三重图案化工艺的半导体器件的制造方法中，在要蚀刻的层上形成覆盖侧壁的多孔层和含聚合物的图案的上表面。 通过多孔层将分解气体供给到含聚合物的图案，并且含有聚合物的图案的一部分被分解以形成还原的含聚合物的图案，并且在含还原聚合物的图案和多孔层之间形成空隙 。 去除多孔层的一部分以形成与含还原聚合物的图案间隔开的多孔间隔物图案。 通过使用还原的含聚合物图案和多孔间隔物图案作为蚀刻掩模来蚀刻待蚀刻的层。