公开(公告)号：US20240413203A1

公开(公告)日：2024-12-12

申请号：US18543414

申请日：2023-12-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang Min YOE ,  Ji Wang KO ,  Jae Hong CHOI ,  Jun Ho HONG ,  Dong Min KIM ,  Jeong Min CHOI

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a substrate. An active pattern is on the substrate and extends in a first horizontal direction. First to third nanosheets are sequentially stacked on the active pattern and are spaced apart from each other in a vertical direction. A gate electrode is on the active pattern and extends in a second horizontal direction. The gate electrode surrounds each of the first to third nanosheets. A source/drain region is on the active pattern on at least one side of the gate electrode. An interlayer insulating layer covers the source/drain region. A source/drain contact penetrates the interlayer insulating layer in the vertical direction and is connected to the source/drain region. At least a portion of the interlayer insulating layer is disposed between sidewalls of the source/drain contact and the source/drain region in the first horizontal direction and overlaps sidewalls of the third nanosheet along the first horizontal direction.

公开(公告)号：US20200027895A1

公开(公告)日：2020-01-23

申请号：US16272265

申请日：2019-02-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Namkyu Edward CHO ,  Seok Hoon KIM ,  Myung II KANG ,  Geo Myung SHIN ,  Seung Hun LEE ,  Jeong Yun LEE ,  Min Hee CHOI ,  Jeong Min CHOI

IPC: H01L27/11582 ,  H01L29/66 ,  H01L29/78 ,  H01L21/768

Abstract: A semiconductor device includes an active fin on a substrate, a gate electrode and intersecting the active fin, gate spacer layers on both side walls of the gate electrode, and a source/drain region in a recess region of the active fin at at least one side of the gate electrode. The source/drain region may include a base layer in contact with the active fin, and having an inner end and an outer end opposing each other in the first direction on an inner sidewall of the recess region. The source/drain region may include a first layer on the base layer. The first layer may include germanium (Ge) having a concentration higher than a concentration of germanium (Ge) included in the base layer. The outer end of the base layer may contact the first layer, and may have a shape convex toward outside of the gate electrode on a plane.

公开(公告)号：US20210159246A1

公开(公告)日：2021-05-27

申请号：US17144458

申请日：2021-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Namkyu Edward CHO ,  Seok Hoon KIM ,  Myung Il KANG ,  Geo Myung SHIN ,  Seung Hun LEE ,  Jeong Yun LEE ,  Min Hee CHOI ,  Jeong Min CHOI

IPC: H01L27/11582 ,  H01L29/66 ,  H01L21/768 ,  H01L29/78

Abstract: A semiconductor device includes an active fin on a substrate, a gate electrode and intersecting the active fin, gate spacer layers on both side walls of the gate electrode, and a source/drain region in a recess region of the active fin at at least one side of the gate electrode. The source/drain region may include a base layer in contact with the active fin, and having an inner end and an outer end opposing each other in the first direction on an inner sidewall of the recess region. The source/drain region may include a first layer on the base layer. The first layer may include germanium (Ge) having a concentration higher than a concentration of germanium (Ge) included in the base layer. The outer end of the base layer may contact the first layer, and may have a shape convex toward outside of the gate electrode on a plane.