公开(公告)号：US20230301101A1

公开(公告)日：2023-09-21

申请号：US18046139

申请日：2022-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghwan Lee ,  Yujin Kwon ,  Jaehong Yoo ,  Hyunmin Cho

IPC: H01L27/11582 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  H01L27/11556

Abstract: An integrated circuit memory device includes a stack structure on a semiconductor substrate. The stack structure includes a first gate stack group, which includes a plurality of spaced-apart first gate electrodes, and a second gate stack group, which includes a plurality of spaced-apart second gate electrodes. The second gate stack group extends on the first gate stack group so that the first gate stack group extends between the second gate stack group and the substrate. A plurality of active channel structures are provided, which penetrate vertically through the second gate stack group as upper channel structures and through the first gate stack group as lower channel structures. A plurality of dummy channel structures are provided, which penetrate vertically through the second gate stack group but not through the first gate stack group.