公开(公告)号：US20250138746A1

公开(公告)日：2025-05-01

申请号：US18738832

申请日：2024-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jesuk YEON ,  In Hwan DOH

IPC: G06F3/06

Abstract: An operating method of a storage device which includes a nonvolatile memory device and a controller controlling the nonvolatile memory device includes receiving, by the controller from a host device, a first logical address of a source range entry, a second logical address of a destination range entry, and a first copy command including a first flag that indicates a background copy is set, mapping, at the controller, a first physical address on the second logical address, mapping, at the controller, a second physical address on the second logical address and/or the first physical address, transmitting, by the controller to the host device, a first notification of a completion of the first copy command, and after the controller transmits the first notification, reading, at the nonvolatile memory device, first data stored at the first physical address and writing the first data at the second physical address.

公开(公告)号：US20190087362A1

公开(公告)日：2019-03-21

申请号：US15964737

申请日：2018-04-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kumar SATISH ,  Jupyung LEE ,  In Hwan DOH ,  JooYoung HWANG

IPC: G06F13/16 ,  G06F13/42 ,  G06F3/06

Abstract: A storage device includes a memory device; and a controller configured to fetch a command from a host, the command indicating a logical address, process the command based on the logical address, and receive, from a first replica storage device, an acknowledgment signal indicating that the command has been processed by the first replica storage device.

公开(公告)号：US20190087332A1

公开(公告)日：2019-03-21

申请号：US16007667

申请日：2018-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yu-hun JUN ,  SIL WAN CHANG ,  Heechul CHAE ,  SEONTAEK KIM ,  In Hwan DOH

IPC: G06F12/0811 ,  G06F3/06

CPC classification number: G06F12/0811 ,  G06F3/0611 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0679 ,  G06F2212/1024 ,  G06F2212/2022

Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.

公开(公告)号：US20160274802A1

公开(公告)日：2016-09-22

申请号：US15069155

申请日：2016-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bum Hoe Koo ,  Nam Wook KANG ,  In Hwan DOH

IPC: G06F3/06

CPC classification number: G06F3/0616 ,  G06F3/0631 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0679

Abstract: A method of operating a memory controller which controls a non-volatile memory including a plurality of blocks is provided. The method includes determining an operation count for a first block among the plurality of blocks and avoiding successive wear-leveling on the first block based on the determined operation count thereof.

Abstract translation: 提供一种操作控制包括多个块的非易失性存储器的存储器控​​制器的方法。 该方法包括确定多个块中的第一块的操作计数，并且基于其确定的操作计数避免第一块上的连续的磨损均衡。