公开(公告)号：US11088144B2

公开(公告)日：2021-08-10

申请号：US16529364

申请日：2019-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeoung-won Seo

IPC: H01L27/108 ,  H01L29/78 ,  H01L21/764

Abstract: A semiconductor device includes a substrate comprising a plurality of active regions extending in a first direction and a device isolation region electrically isolating the plurality of active regions, a gate trench extending across the plurality of active regions and the device isolation region, a gate structure extending in the gate trench of each of and along opposite sidewalls of the plurality of active regions, a gate dielectric film formed between the gate trench and the gate structure in each of the plurality of active regions, and an insulating barrier film provided in each of the plurality of active regions under the gate trench spaced apart from a lower surface of the gate trench and extending in an extension direction of the gate trench.

公开(公告)号：US20200161306A1

公开(公告)日：2020-05-21

申请号：US16529364

申请日：2019-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeoung-won Seo

IPC: H01L27/108

Abstract: A semiconductor device includes a substrate comprising a plurality of active regions extending in a first direction and a device isolation region electrically isolating the plurality of active regions, a gate trench extending across the plurality of active regions and the device isolation region, a gate structure extending in the gate trench of each of and along opposite sidewalls of the plurality of active regions, a gate dielectric film formed between the gate trench and the gate structure in each of the plurality of active regions, and an insulating barrier film provided in each of the plurality of active regions under the gate trench spaced apart from a lower surface of the gate trench and extending in an extension direction of the gate trench.

公开(公告)号：US20240114677A1

公开(公告)日：2024-04-04

申请号：US18526987

申请日：2023-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeoung-won Seo

IPC: H10B12/00

CPC classification number: H10B12/34 ,  H10B12/053 ,  H01L29/7827

Abstract: A semiconductor device includes a substrate comprising a plurality of active regions extending in a first direction and a device isolation region electrically isolating the plurality of active regions, a gate trench extending across the plurality of active regions and the device isolation region, a gate structure extending in the gate trench of each of and along opposite sidewalls of the plurality of active regions, a gate dielectric film formed between the gate trench and the gate structure in each of the plurality of active regions, and an insulating barrier film provided in each of the plurality of active regions under the gate trench spaced apart from a lower surface of the gate trench and extending in an extension direction of the gate trench.

公开(公告)号：US11871559B2

公开(公告)日：2024-01-09

申请号：US17380830

申请日：2021-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeoung-won Seo

IPC: H10B12/00 ,  H01L29/78 ,  H01L21/764

CPC classification number: H10B12/34 ,  H10B12/053 ,  H01L21/764 ,  H01L29/7827 ,  H10B12/315

Abstract: A semiconductor device includes a substrate comprising a plurality of active regions extending in a first direction and a device isolation region electrically isolating the plurality of active regions, a gate trench extending across the plurality of active regions and the device isolation region, a gate structure extending in the gate trench of each of and along opposite sidewalls of the plurality of active regions, a gate dielectric film formed between the gate trench and the gate structure in each of the plurality of active regions, and an insulating barrier film provided in each of the plurality of active regions under the gate trench spaced apart from a lower surface of the gate trench and extending in an extension direction of the gate trench.

公开(公告)号：US20210351186A1

公开(公告)日：2021-11-11

申请号：US17380830

申请日：2021-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeoung-won Seo

IPC: H01L27/108

Abstract: A semiconductor device includes a substrate comprising a plurality of active regions extending in a first direction and a device isolation region electrically isolating the plurality of active regions, a gate trench extending across the plurality of active regions and the device isolation region, a gate structure extending in the gate trench of each of and along opposite sidewalls of the plurality of active regions, a gate dielectric film formed between the gate trench and the gate structure in each of the plurality of active regions, and an insulating barrier film provided in each of the plurality of active regions under the gate trench spaced apart from a lower surface of the gate trench and extending in an extension direction of the gate trench.

公开(公告)号：US08873277B2

公开(公告)日：2014-10-28

申请号：US13648300

申请日：2012-10-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeoung-won Seo ,  Soo-ho Shin ,  Won-woo Lee ,  Jeong-soo Park ,  Young-yong Byun ,  Seong-jin Jang ,  Sang-woong Shin

IPC: G11C7/00 ,  G11C11/4091 ,  G11C8/14 ,  G11C11/4094 ,  G11C7/12

CPC classification number: G11C8/14 ,  G11C7/12 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2207/005

Abstract: A semiconductor memory device includes a plurality of memory cell blocks including a first memory cell block having bit lines, an edge sense amplifier block including edge sense amplifiers coupled to a portion of the bit lines of the first memory cell block, and a balancing capacitor unit coupled to the edge sense amplifiers.

Abstract translation: 半导体存储器件包括多个存储单元块，它们包括具有位线的第一存储单元块，边沿读出放大器块，其包括耦合到第一存储单元块的位线的一部分的边沿读出放大器，以及平衡电容器单元 耦合到边缘读出放大器。