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公开(公告)号:US20220223604A1
公开(公告)日:2022-07-14
申请号:US17469349
申请日:2021-09-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hwanyeol PARK , Hwanwoo KIM , Jongkyu LEE , Chulhwan CHOI
IPC: H01L27/108 , H01L25/065
Abstract: A semiconductor structure of the inventive concepts includes a chip region comprising a plurality of semiconductor chips on the substrate; and a peripheral region at a periphery of the chip region, the peripheral region including a mold structure. The mold structure may include a base mold layer on the substrate, and a composite mold layer on the base mold layer, the composite mold layer comprising at least one bowing sacrificial layer and at least one bowing prevention layer.
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公开(公告)号:US20220344166A1
公开(公告)日:2022-10-27
申请号:US17522193
申请日:2021-11-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hwanyeol PARK , Jongyoung PARK , Yongdeok LEE , Sejin KYUNG , Daewee KONG , Ilwoo KIM , Songyi BAEK , Philippe COCHE
IPC: H01L21/308 , H01L21/02 , H01L49/02 , H01L21/768
Abstract: Provided is a semiconductor device. The semiconductor device includes a wafer; an etch stop layer on the wafer; a lower mold layer on the etch stop layer; an intermediate supporter layer on the lower mold layer; an upper mold layer on the intermediate supporter layer; an upper supporter layer on the upper mold layer; and a hard mask structure on the upper supporter layer, wherein the hard mask structure includes a first hard mask layer on the upper supporter layer and a second hard mask layer on the first hard mask layer, one of the first hard mask layer and the second hard mask layer includes a first organic layer including a SOH containing C, H, O, and N, and the other one of the first hard mask layer and the second hard mask layer includes a second organic layer including an SOH containing C, H, and O.
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公开(公告)号:US20230074307A1
公开(公告)日:2023-03-09
申请号:US17852628
申请日:2022-06-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hwanyeol PARK , Kyungnam KANG , Jeonghoon NAM , Sejin KYUNG , Daewee KONG , Taemin KIM
IPC: C23C16/458 , H01L21/687 , H01J37/32 , C23C16/50 , C23C16/455 , C23C16/46 , H05B3/12 , H05B3/28
Abstract: A substrate support unit includes: a ceramic body having a surface for supporting a substrate, the ceramic body including aluminum nitride (AlN), a heat generating resistor disposed in the ceramic body, and including molybdenum (Mo), and a coating layer surrounding the heat generating resistor, and including molybdenum aluminum nitride (MoAlN).
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公开(公告)号:US20230081402A1
公开(公告)日:2023-03-16
申请号:US17899832
申请日:2022-08-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hwanyeol PARK , Sejun PARK , Junhyoung CHO , Sejin KYUNG , Daewee KONG , Taemin KIM
IPC: H01L21/30
Abstract: A method of manufacturing a semiconductor device includes preparing a substrate including cell regions and a scribe lane region, forming circuit blocks in the cell regions of the substrate, the substrate including a first surface and a second surface, forming a bias pad on the first surface of the substrate, such that the bias pad is in the scribe lane region of the substrate, bonding a deuterium exchange structure to the second surface of the substrate, implanting deuterium into the deuterium exchange structure using plasma processing, and applying a first voltage to the bias pad, such that the deuterium is diffused from the deuterium exchange structure into the substrate through the second surface of the substrate.
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公开(公告)号:US20230020305A1
公开(公告)日:2023-01-19
申请号:US17736229
申请日:2022-05-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hwanyeol PARK , Kyung Nam KANG , Jeong Hoon NAM , Se Jin KYUNG , Dae Wee KONG , Tae-Min KIM
Abstract: An apparatus for manufacturing a semiconductor device and a method of manufacturing the apparatus, the apparatus including a heater configured to heat a target, and a coating layer, the coating layer including a ternary material of transition metal(M)-aluminum(Al)-nitrogen(N) represented by the following Chemical Formula:
[Chemical Formula] MxAl1−xNy, wherein x and y satisfy the following relations: 0-
公开(公告)号:US20220344367A1
公开(公告)日:2022-10-27
申请号:US17505842
申请日:2021-10-20
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hwanyeol PARK , Sejin KYUNG , Ilwoo KIM , Minwoo LEE , Youngho JEUNG
IPC: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157
Abstract: In a method of manufacturing a semiconductor device, a first insulation layer and a first sacrificial layer are alternately and repeatedly formed on a substrate to form a mold layer. A sacrificial layer structure is formed on the mold layer to include an etch stop layer and a second sacrificial layer sequentially stacked. After forming a hard mask on the sacrificial layer structure, the sacrificial layer structure and the mold layer are etched by a dry etching process using the hard mask as an etching mask to form a channel hole exposing an upper surface of the substrate and form a recess on a sidewall of the second sacrificial layer adjacent to the channel hole. A memory channel structure is formed in the channel hole. The first sacrificial layer is replaced with a gate electrode.
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