公开(公告)号：US20160372423A1

公开(公告)日：2016-12-22

申请号：US15156327

申请日：2016-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi-Na CHOI ,  Young-Deuk KIM ,  Jae-Choon KIM ,  Eon-Soo JANG ,  Hee-Jung HWANG

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538

CPC classification number: H01L23/562 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2224/81815 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2224/45099

Abstract: A package substrate may include an insulating substrate, internal circuits and a warpage-suppressing member. The insulating substrate may have a plurality of mount regions in which semiconductor chips may be mounted, and a peripheral region. The internal circuits may be arranged in the mount regions. The warpage-suppressing member is different from the semiconductor chips and may be arranged in at least one of the mount regions to suppress a warpage of the insulating substrate. Thus, warpage of the package substrate may be suppressed during a reflow process.

Abstract translation: 封装基板可以包括绝缘基板，内部电路和翘曲抑制部件。 绝缘基板可以具有可以安装半导体芯片的多个安装区域和周边区域。 内部电路可以布置在安装区域中。 翘曲抑制部件与半导体芯片不同，并且可以布置在至少一个安装区域中，以抑制绝缘基板的翘曲。 因此，可以在回流工艺期间抑制封装衬底的翘曲。

公开(公告)号：US20140159185A1

公开(公告)日：2014-06-12

申请号：US14098858

申请日：2013-12-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hee-Jung HWANG

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14618 ,  H01L2224/05554 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/16195 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An image sensor package including a PCB including bonding areas, an image sensor including bonding pads on edge portions thereof on the PCB, bonding wires connecting the bonding pads with the bonding areas, an insulating adhesion film attaching the bonding wires to the bonding pads on the edge portions of the image sensor, a heat spread pattern spaced apart from the bonding wires and the image sensor on the insulating adhesion film, a supporting holder spaced apart from the edge portions of the image sensor, encloses the image sensor, contacts a top surface of the heat spread pattern and the PCB, and includes a supporting portion at an upper portion thereof, and a transparent cover covering the image sensor on the supporting portion of the supporting holder and spaced apart from the top surface of the image sensor is provided.

Abstract translation: 一种图像传感器封装，包括具有接合区域的PCB，包括在PCB的边缘部分上的接合焊盘的图像传感器，将接合焊盘与接合区域连接的接合线，将接合线附接到接合焊盘上的绝缘粘合膜 图像传感器的边缘部分，与接合线隔开的热扩散图案和绝缘粘合膜上的图像传感器，与图像传感器的边缘部分间隔开的支撑保持器，包围图像传感器，接触顶部表面 的散热图案和PCB，并且在其上部包括支撑部分，并且设置覆盖支撑保持器的支撑部分并与图像传感器的顶表面间隔开的图像传感器的透明盖。

公开(公告)号：US20140239300A1

公开(公告)日：2014-08-28

申请号：US14068091

申请日：2013-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mi-Na CHOI ,  Ji-Chul KIM ,  Se-Ran BAE ,  Eun-Seok CHO ,  Hee-Jung HWANG

IPC: H01L21/66

CPC classification number: H01L23/345 ,  G01R31/2875 ,  H01L22/34 ,  H01L23/34 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/15311

Abstract: Semiconductor test devices and methods for fabricating the same may be provided. The semiconductor test device may include a first thermal test flip chip cell including a first heater and a first sensor, and a test substrate formed under the first thermal test flip chip cell. The first thermal test flip chip cell may include a plurality of first bumps arranged on a bottom surface of the first thermal test flip chip cell and be configured to be electrically connected to the first heater and the first sensor. The test substrate may include a first ball array arranged on a bottom surface of the test substrate in a first direction and be configured to be electrically connected to the plurality of first bumps, which are electrically connected to the first heater and the first sensor.

Abstract translation: 可以提供半导体测试装置及其制造方法。 半导体测试装置可以包括第一热测试倒装芯片单元，其包括第一加热器和第一传感器，以及形成在第一热测试倒装芯片单元下的测试基板。 第一热测试倒装芯片单元可以包括布置在第一热测试倒装芯片单元的底表面上的多个第一凸块，并且被配置为电连接到第一加热器和第一传感器。 测试基板可以包括在第一方向上布置在测试基板的底表面上的第一球阵列，并且被配置为电连接到电连接到第一加热器和第一传感器的多个第一凸块。