公开(公告)号：US20240304661A1

公开(公告)日：2024-09-12

申请号：US18598552

申请日：2024-03-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gina Lee ,  Seil Oh ,  Inseok Baek ,  Changsik Yoo

IPC: H10B12/00

CPC classification number: H01L28/90 ,  H10B12/30 ,  H10B12/50

Abstract: An integrated circuit device includes a substrate including a cell array region and a peripheral circuit region, a first ion implantation region located in an upper portion of the substrate in the peripheral circuit region, the first ion implantation region having a plurality of line trenches that extend in a first horizontal direction and cross the first ion implantation region, a plurality of lower capacitor dielectric films with each lower capacitor dielectric film configured to respectively cover inner walls of a respective line trench, a plurality of buried conductive lines that each partially fill a respective line trench and that are each respectively disposed on a respective lower capacitor dielectric film, a plurality of first lower capacitor contacts that are each in contact with a respective buried conductive line, and a plurality of second lower capacitor contacts that are in contact with the first ion implantation region.