Electronic device and method for communicating with external device through power source line

    公开(公告)号:US11456608B2

    公开(公告)日:2022-09-27

    申请号:US16812070

    申请日:2020-03-06

    Abstract: An electronic device includes a battery, a charging integrated circuit (IC) configured to control a charging state of the battery, a connector pin for receiving power from an external device, the connector pin including a first connector pin for receiving a high potential voltage from the external device and a second connector pin for receiving a low potential voltage from the external device, a touch sensor, and a controller. The controller receives power from the external device through the connector pin based on the detection of the external device being connected to the connector pin, charges the battery using a high potential voltage, detects a user input through the touch sensor while the battery is charged, and stops the charging of the battery and outputs a current corresponding to state information of the electronic device through the first connector pin based on the detection of the given user input.

    Method for controlling earpiece and electronic device for supporting the same

    公开(公告)号:US10477296B2

    公开(公告)日:2019-11-12

    申请号:US16222902

    申请日:2018-12-17

    Abstract: An electronic device according to various embodiments of the present disclosure may include a communication interface and a processor, wherein the processor may be configured to receive first battery level information of a first earpiece and second battery level information of a second earpiece, via the communication interface, to identify a charging method corresponding to the first battery level and the second battery level, among a plurality of charging methods for charging at least one of the first earpiece or the second earpiece, and to control to supply charging power to at least one of the first earpiece or the second earpiece, via a cable which connects the electronic device with at least one of the first earpiece or the second earpiece, using the charging method.

    SEMICONDUCTOR DEVICES COMPRISING FAILURE DETECTORS FOR DETECTING FAILURE OF BIPOLAR JUNCTION TRANSISTORS AND METHODS FOR DETECTING FAILURE OF THE BIPOLAR JUNCTION TRANSISTORS

    公开(公告)号:US20250085329A1

    公开(公告)日:2025-03-13

    申请号:US18958291

    申请日:2024-11-25

    Abstract: A semiconductor device may include a voltage generator configured to generate a first base-emitter voltage of a first bipolar junction transistor, and a failure detector configured to generate a failure signal by comparing the first base-emitter voltage with an upper limit reference voltage and a lower limit reference voltage. The failure detector may include a second bipolar junction transistor a current source configured to generate a bias current, a first resistor coupled between the current source and a emitter of the second bipolar junction transistor to generate the upper limit reference voltage, a second resistor and a third resistor configured to divide a second base-emitter voltage of the second bipolar junction transistor to generate the lower limit reference voltage, and a first and second comparator configured to compare the first base-emitter voltage with the upper limit reference voltage and the lower limit reference voltage, respectively, to generate respective failure signals.

    Laser detecting circuit and semiconductor apparatus including the same

    公开(公告)号:US12230588B2

    公开(公告)日:2025-02-18

    申请号:US17860699

    申请日:2022-07-08

    Abstract: A laser detecting circuit is provided. The laser detecting circuit includes a latch circuit with a first inverter configured to invert a first output signal at a first node to generate a second output signal at a second node, and a second inverter configured to generate the first output signal based on the second output signal. The second inverter includes a plurality of PMOS transistors connected in series between a first source voltage and the first node, and a plurality of NMOS transistors. A gate of each of the plurality of PMOS transistors is connected to the second node, and a drain of each of the plurality of NMOS transistors is connected to the first node. The plurality of NMOS transistors includes dummy NMOS transistors and normal NMOS transistors.

    GLITCH DETECTOR AND GLITCH DETECTION METHOD USING THE SAME

    公开(公告)号:US20240354449A1

    公开(公告)日:2024-10-24

    申请号:US18413852

    申请日:2024-01-16

    Inventor: Donghun Heo

    CPC classification number: G06F21/81 G06F21/78

    Abstract: A glitch detector, a glitch detection method, and a security device including the glitch detector. The glitch detector includes: a sensing unit configured to generate a glitch voltage and at least one reference voltage based on a power supply voltage; a clock generator configured to receive a monitoring voltage corresponding to at least one from among the power supply voltage and the glitch voltage, and to output a clock signal including a plurality of pulse signals while a voltage change occurs in the monitoring voltage, wherein the plurality of pulse signals have a predetermined period; and a comparison unit configured to operate based on each of the plurality of pulse signals, and to compare the glitch voltage with the at least one reference voltage and output a detection voltage based on determining that a glitch has occurred.

    CLOCK MONITORING CIRCUIT
    8.
    发明公开

    公开(公告)号:US20240183901A1

    公开(公告)日:2024-06-06

    申请号:US18523269

    申请日:2023-11-29

    CPC classification number: G01R31/31727 G06F1/08 H03K21/08

    Abstract: A clock monitoring circuit includes a clock enable signal generator configured to generate an ultra-high frequency clock enable signal based on a clock enable control signal and a reference clock signal, and an ultra-high frequency detector configured to generate an ultra-high frequency determination signal indicating whether a selection clock signal is an ultra-high frequency signal, based on the selection clock signal, the ultra-high frequency clock enable signal, and the reference clock signal.

    Glitch detector, security device including the same and electronic system including the same

    公开(公告)号:US11486912B2

    公开(公告)日:2022-11-01

    申请号:US17314693

    申请日:2021-05-07

    Abstract: A glitch detector includes a sensing circuit, a glitch-to-pulse generator and a comparing circuit. The sensing circuit generates a glitch voltage and at least one reference voltage based on a first power supply voltage. The glitch-to-pulse generator receives the first power supply voltage or the glitch voltage, and generates at least one pulse voltage including a pulse when the glitch occurs on the first power supply voltage. The comparing circuit generates at least one detection voltage by comparing the glitch voltage with the at least one reference voltage based on the pulse included in the at least one pulse voltage. The at least one detection voltage is activated when the glitch occurs on the first power supply voltage.

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