公开(公告)号：US20140057427A1

公开(公告)日：2014-02-27

申请号：US14070935

申请日：2013-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Kwon KIM ,  Young-Ju PARK ,  Dong-Hyuk YEAM ,  Yoo-jung LEE ,  Myeong-cheol KIM ,  Do-Hyoung KIM ,  Heung-Sik PARK

IPC: H01L21/28

CPC classification number: H01L21/28132 ,  H01L21/28114 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6656

Abstract: Example embodiments relate to a method for manufacturing a semiconductor device, wherein a metal gate electrode therein may be formed without a void in a lower portion of the metal gate electrode. The method may include providing a substrate, forming a dummy gate electrode on the substrate, forming a gate spacer on the substrate to be contiguous to the dummy gate electrode, forming a first recess by simultaneously removing a portion of the dummy gate electrode and a portion of the gate spacer, the first recess having an upper end wider than a lower end, forming a second recess by removing the dummy gate electrode remaining after forming the first recess, and forming a metal gate electrode by depositing a metal to fill the first and second recesses.

Abstract translation: 示例性实施例涉及用于制造半导体器件的方法，其中可以在金属栅电极的下部中形成其中的金属栅极电极，而不产生空隙。 该方法可以包括提供衬底，在衬底上形成虚拟栅电极，在衬底上形成与虚拟栅电极相邻的栅极间隔物，通过同时去除虚拟栅电极的一部分形成第一凹槽， 所述第一凹部具有比下端更宽的上端，通过去除在形成所述第一凹部之后残留的所述虚设栅电极形成第二凹槽，以及通过沉积金属以填充所述第一凹部而形成金属栅电极，以填充所述第一凹部 第二个凹槽

公开(公告)号：US20160314983A1

公开(公告)日：2016-10-27

申请号：US14693668

申请日：2015-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun-Shoo HAN ,  Dong-Kwon KIM ,  Bong-Cheol KIM ,  Kang-ILL SEO

IPC: H01L21/308 ,  H01L21/8234

CPC classification number: H01L21/3086 ,  H01L21/3081 ,  H01L21/823431 ,  H01L29/66795

Abstract: A method of forming patterns of a semiconductor device includes sequentially forming first to third mask layers on a substrate including a first region and a second region, etching the third mask layer formed in the first region to form first mask elements of a first mask pattern, etching the third mask layer formed in the second region to form second mask elements of a second mask pattern, forming a first spacer film covering the second mask elements, forming a second spacer film on the first spacer film to fully fill at least one trench between the second mask elements and on the first mask elements, removing portions of the first and second spacer films to expose the upper surfaces of the first and second mask elements, etching the second mask layer, etching the first mask layer, and etching the substrate.

Abstract translation: 一种形成半导体器件的图案的方法包括在包括第一区域和第二区域的衬底上依次形成第一至第三掩模层，蚀刻形成在第一区域中的第三掩模层以形成第一掩模图案的第一掩模元件， 蚀刻在第二区域中形成的第三掩模层以形成第二掩模图案的第二掩模元件，形成覆盖第二掩模元件的第一间隔膜，在第一间隔膜上形成第二间隔膜，以完全填充至少一个沟槽， 第二掩模元件和第一掩模元件，去除第一和第二间隔膜的部分以暴露第一和第二掩模元件的上表面，蚀刻第二掩模层，蚀刻第一掩模层，以及蚀刻衬底。