公开(公告)号：US20240334681A1

公开(公告)日：2024-10-03

申请号：US18501120

申请日：2023-11-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： MYUNGHUN JUNG ,  KYUWON WOO ,  DONGHWA SHIN ,  SUNG-JIN YEO ,  HO-IN RYU

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/315 ,  H10B12/485 ,  H10B12/50

Abstract: A semiconductor device includes a substrate including a cell block region and a peripheral region adjacent to each other in a first direction, first and second active patterns adjacent to each other in a second direction that is different from the first direction on the cell block region, a first bit line extending in the first direction on the first active pattern, a second bit line extending in the first direction on the second active pattern, a bit line connector connecting the first bit line and the second bit line to each other and adjacent to the peripheral region, an inner spacer on an inner surface of the bit line connector, and an outer spacer on an outer surface of the bit line connector. The inner spacer extends on (e.g., covers) the inner surface of the bit line connector and extends onto (e.g., continuously extends onto) inner surfaces of the first bit line and the second bit line.

公开(公告)号：US20240179892A1

公开(公告)日：2024-05-30

申请号：US18353137

申请日：2023-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： MYUNGHUN JUNG ,  DONGHWA SHIN ,  SUNG-JIN YEO ,  HO-IN RYU

IPC: H10B12/00

CPC classification number: H10B12/482 ,  H10B12/02

Abstract: A semiconductor device may include a substrate including a core region, a cell block region, and a peripheral region, which are sequentially arranged in a first direction, and a bit line structure on the cell block region. The bit line structure may include a first bit line and a second bit line, which extend in the first direction and are adjacent to each other in a second direction crossing the first direction, a bit line connector, which electrically connects the first bit line to the second bit line and is adjacent to the peripheral region, and a bit line pad, which is electrically connected to the first bit line and is adjacent to the core region.

公开(公告)号：US20230120682A1

公开(公告)日：2023-04-20

申请号：US17857441

申请日：2022-07-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： SEOK-HYUN KIM ,  KANG-UK KIM ,  YOUNGSIN KIM ,  JINA KIM ,  DONGHWA SHIN

IPC: H01L27/108

Abstract: A semiconductor device includes a substrate including an active cell region, a boundary region, and a dummy cell region therebetween, bit lines disposed on the active cell region, extended in a first direction, and spaced apart from each other in a second direction, the bit lines including first and second bit lines alternately arranged in the second direction, bitline pads spaced apart from each other in the second direction on the boundary region, the second bit lines being extended to the dummy cell region and the boundary region in the first direction and being connected to the bitline pads, respectively, and an insulating separation pattern on the boundary region and between the bitline pads. A portion of the insulating separation pattern is extended into a region between the second bit lines on the boundary region and is in contact with an end portion of a corresponding first bit line.