公开(公告)号：US20220181329A1

公开(公告)日：2022-06-09

申请号：US17328228

申请日：2021-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wooyoung CHOI ,  Woonghwi BAE ,  Jinwoo BAE ,  Chaelin YOON ,  Sunghee HAN ,  Sunwoo HEO ,  Deoksung HWANG

IPC: H01L27/108

Abstract: A semiconductor device includes first bit lines disposed on a substrate. Buried contacts disposed among first bit lines and connected to the substrate are provided. Landing pads are disposed on the buried contacts. Second bit lines are disposed on a peripheral area of the substrate. Upper surfaces of the second bit lines and the landing pads are coplanar with each other. First insulating patterns are disposed among the second bit lines. Second insulating patterns are disposed among the landing pads. Cell capacitors connected to the landing pads are disposed. The first insulating patterns include an insulating layer different from at least one insulating layer of the second insulating patterns.