公开(公告)号：US20200144277A1

公开(公告)日：2020-05-07

申请号：US16724444

申请日：2019-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoung Il LEE ,  Ji Mo GU ,  Tak LEE ,  Jun Ho CHA

IPC: H01L27/11556 ,  H01L27/11573 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11548 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11565

Abstract: A semiconductor device includes a substrate having first and second regions, a gate electrode stack having a plurality of gate electrodes vertically stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate in the first region, and extending to have different lengths in a second direction parallel to the upper surface of the substrate from the first region to the second region, first and second isolation regions extending in the second direction perpendicular to the first direction, while penetrating through the gate electrode stack on the substrate, in the first and second regions, string isolation regions disposed between the first and second isolation regions in the first region, and extending in the second direction while penetrating through a portion of the gate electrode stack, and a plurality of auxiliary isolation regions disposed linearly with the string isolation regions in at least one of the first and second regions, and spaced apart from each other in the second direction.

公开(公告)号：US20180374862A1

公开(公告)日：2018-12-27

申请号：US15925365

申请日：2018-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoung Il LEE ,  Ji Mo GU ,  Tak LEE ,  Jun Ho CHA

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L27/11529 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/1157 ,  H01L27/11548

CPC classification number: H01L27/11556 ,  H01L27/11529 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

Abstract: A semiconductor device includes a substrate having first and second regions, a gate electrode stack having a plurality of gate electrodes vertically stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate in the first region, and extending to have different lengths in a second direction parallel to the upper surface of the substrate from the first region to the second region, first and second isolation regions extending in the second direction perpendicular to the first direction, while penetrating through the gate electrode stack on the substrate, in the first and second regions, string isolation regions disposed between the first and second isolation regions in the first region, and extending in the second direction while penetrating through a portion of the gate electrode stack, and a plurality of auxiliary isolation regions disposed linearly with the string isolation regions in at least one of the first and second regions, and spaced apart from each other in the second direction.