公开(公告)号：US20160315080A1

公开(公告)日：2016-10-27

申请号：US15001283

申请日：2016-01-20

Applicant: Samsung Electronics Co .. Ltd.

Inventor： Jae-yeol SONG ,  Wan-don KIM ,  Oh-seong KWON ,  Hyeok-jun SON ,  Sang-jin HYUN ,  Hoon-joo NA

IPC: H01L27/088 ,  H01L29/06

CPC classification number: H01L27/0886 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823462 ,  H01L29/0653 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

Abstract: Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate structure includes first gate insulating layer on the first fin-type active region to cover upper surface and both side surfaces of the first fin-type active region, first gate electrode on the first gate insulating layer and has first thickness in first direction perpendicular to upper surface of the substrate, and second gate electrode on the first gate electrode. The second gate structure includes second gate insulating layer on the second fin-type active region to cover upper surface and both side surfaces of the second fin-type active region, third gate insulating layer on the second gate insulating layer, third gate electrode on the third gate insulating layer and has second thickness different from the first thickness in the first direction, and fourth gate electrode on the third gate electrode.

Abstract translation: 集成电路器件包括包括第一和第二鳍式有源区以及第一和第二栅极结构的衬底。 第一栅极结构包括第一鳍状有源区上的第一栅极绝缘层，以覆盖第一鳍状有源区的上表面和两个侧表面，第一栅极绝缘层上的第一栅电极和第一栅极绝缘层的第一方向上具有第一厚度 垂直于衬底的上表面，以及第一栅电极上的第二栅电极。 第二栅极结构包括在第二鳍状有源区上的第二栅极绝缘层，以覆盖第二鳍状有源区的上表面和两个侧表面，第二栅极绝缘层上的第三栅极绝缘层，第二栅极绝缘层上的第三栅极电极 第三栅极绝缘层，并且具有与第一方向上的第一厚度不同的第二厚度，以及第三栅电极上的第四栅电极。

公开(公告)号：US20190148226A1

公开(公告)日：2019-05-16

申请号：US16154896

申请日：2018-10-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-hyuk YIM ,  Kuo Tai HUANG ,  Wan-don KIM ,  Sang-jin HYUN

IPC: H01L21/768 ,  H01L23/522 ,  H01L29/66 ,  H01L29/417 ,  H01L23/532

Abstract: An integrated circuit (IC) device includes a substrate having a fin-type active region extending in a first direction, a gate structure intersecting the fin-type active region on the substrate, the gate structure extending in a second direction perpendicular to the first direction and parallel to a top surface of the substrate, source and drain regions on both sides of the gate structure, and a first contact structure electrically connected to one of the source and drain regions, the first contact structure including a first contact plug including a first material and a first wetting layer surrounding the first contact plug, the first wetting layer including a second material having a lattice constant that differs from a lattice constant of the first material by about 10% or less.