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公开(公告)号:US09029971B2
公开(公告)日:2015-05-12
申请号:US13629780
申请日:2012-09-28
Applicant: Samsung Display Co., Ltd.
Inventor: Ki-Hun Jeong , Woongkwon Kim , Jung Suk Bang , Daecheol Kim , Sungryul Kim , ByeongHoon Cho , Sungjin Mun , Kun-Wook Han
CPC classification number: H01L33/48 , G02F2001/13312 , G06F3/0412 , G06F2203/04103 , G09G3/00 , H01L33/005
Abstract: A display apparatus includes a first substrate including a plurality of pixels, and a second substrate facing the first substrate, the second substrate comprising a sensor area and a peripheral area, the sensor area comprising a plurality of sensors. The second substrate includes an insulating layer, and a plurality of lines disposed on the insulating layer corresponding to the peripheral area and connected to the sensors. A void is formed in the insulating layer between two adjacent lines of the plurality of lines at a boundary of the sensor area and the peripheral area.
Abstract translation: 显示装置包括包括多个像素的第一基板和面对第一基板的第二基板,第二基板包括传感器区域和周边区域,传感器区域包括多个传感器。 第二基板包括绝缘层,以及设置在绝缘层上的与周边区域对应并连接到传感器的多条线。 在传感器区域和周边区域的边界处,在多条线路的两条相邻线路之间的绝缘层中形成空穴。
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公开(公告)号:US10340297B2
公开(公告)日:2019-07-02
申请号:US15485194
申请日:2017-04-11
Applicant: Samsung Display Co., Ltd.
Inventor: Kwihyun Kim , Yoon-jang Kim , Sungryul Kim , Yunseok Lee
IPC: H01L27/12 , G09G3/36 , H01L29/786 , H01L29/417
Abstract: Deterioration of image quality in a display device due to kickback voltages may be reduced or prevented by varying parasite capacitance, the size of the semiconductor layer, and/or storage capacitance in each of thin film transistors for the pixels in the display. Various embodiments of display devices capable of reducing or preventing kickback voltages are disclosed.
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公开(公告)号:US10133114B2
公开(公告)日:2018-11-20
申请号:US15396781
申请日:2017-01-02
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yoonjang Kim , Wansoon Im , Sungryul Kim , Yunseok Lee
IPC: G02F1/1335 , G02F1/1343 , G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/786 , H01L29/24 , G02F1/1333 , G02F1/1337
Abstract: A display device includes: a base substrate including a pixel area at which an image is displayed; a light blocking pattern on the base substrate; a thin film transistor on the light blocking pattern; a gate line connected to the thin film transistor and lengthwise extending in a first direction; a data line connected to the thin film transistor and lengthwise extending in a second direction; and a pixel electrode in the pixel area and spaced apart from the gate line in the second direction. The light blocking pattern includes: a first light blocking pattern lengthwise extending in the first direction; and a second light blocking pattern overlapping the thin film transistor. The first light blocking pattern overlaps the gate line and the pixel electrode spaced apart from each other in the second direction.
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