公开(公告)号：US10466558B2

公开(公告)日：2019-11-05

申请号：US15616276

申请日：2017-06-07

Applicant: Samsung Display Co., Ltd.

Inventor： Moon-Keun Choi ,  Sijin Kim ,  Hyun-Jung Lee ,  Yeontaek Jeong ,  Seungjoo Choi

IPC: G02F1/1339 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1337

Abstract: A display substrate includes a base substrate, a switching element disposed on the base substrate a first layer disposed on the switching element, a first electrode disposed on the first layer, an insulation layer disposed on the first electrode, and a spacer disposed on the contact hole of the insulation layer. The switching element includes a gate electrode, a source electrode, and a drain electrode. A contact hole is defined in the insulation layer to partially exposing expose a portion of the first electrode.

公开(公告)号：US10473985B2

公开(公告)日：2019-11-12

申请号：US15417691

申请日：2017-01-27

Applicant: Samsung Display Co., Ltd.

Inventor： Hyoung-Joon Kim ,  Sijin Kim ,  Hyangyul Kim ,  Matthew Smith ,  Jae Hoon Jung ,  Moon-Keun Choi ,  Seungjoo Choi

IPC: G02F1/1339 ,  G02F1/1335 ,  G02F1/1333

Abstract: A display apparatus includes a first substrate, a color filter, a gap maintaining pattern, a column spacer, and a blocking dam. The first substrate includes a display area and a peripheral area surrounding the display area. The color filter is disposed in the display area. The gap maintaining pattern is disposed in the peripheral area in a same layer as the color filter. The column spacer is disposed on the color filter. The blocking dam is disposed in a same layer as the column spacer and overlaps the gap maintaining pattern. The difference between the gap of the first and second substrates in the display area and the gap of the first and second substrates in the peripheral area may be decreased.

公开(公告)号：US09823531B2

公开(公告)日：2017-11-21

申请号：US14277526

申请日：2014-05-14

Applicant: Samsung Display Co., Ltd.

Inventor： Tae-Young Choi ,  Bo Sung Kim ,  Jae Woo Park ,  Hee Jun Byeon ,  Young-Wook Lee ,  Moon-Keun Choi

IPC: G02F1/1362 ,  H01L27/12 ,  H01L27/02

CPC classification number: G02F1/136286 ,  G02F1/136204 ,  H01L27/0288 ,  H01L27/124

Abstract: A thin film transistor array panel includes: gate lines; data lines insulated from and crossing the gate lines; and shorting bars disposed outside of a display area in which the gate lines cross the data lines. The shorting bars overlap portions of the data lines disposed outside of the display area. The shorting bar includes a semiconductor material.