公开(公告)号：US20190206303A1

公开(公告)日：2019-07-04

申请号：US16234446

申请日：2018-12-27

Applicant: Samsung Display Co., LTD.

Inventor： Junghwan HWANG

IPC: G09G3/20

Abstract: A gate driving circuit comprising stages cascade-connected with each other and configured to output gate signals, a stage of the stages including a pull-up circuit configured to output a high voltage of a clock signal as a high voltage of a gate signal in response to a bootstrap voltage of a control node in a period of a frame period, a first discharging circuit configured to discharge a voltage of the control node to a first low voltage in response to a carry signal of at least one stage of the plurality of stages that is subsequent to the stage, and a second discharging circuit configured to discharge a voltage of the control node to a second low voltage being lower than the first low voltage in response to a carry signal of at least one stage of the plurality of stages that is subsequent to the stage.

公开(公告)号：US20190340991A1

公开(公告)日：2019-11-07

申请号：US16518710

申请日：2019-07-22

Applicant: Samsung Display Co., Ltd.

Inventor： Junghwan HWANG ,  Sehyoung CHO

IPC: G09G3/36

Abstract: A gate driving circuit includes: a plurality of stages to provide gate signals to gate lines of a display panel, a k-th stage, where k is a natural number greater than or equal to 2, from among the plurality of stages being configured: to receive a clock signal, a (k−1)th carry signal from a (k−1)th stage, a (k+1)th carry signal from a (k+1)th stage, a (k+2)th carry signal from a (k+2)th stage, a first voltage, and a second voltage, the clock signal being a pulse signal in which a high voltage and a third voltage appear periodically, and the third voltage having a lower voltage level than those of the first voltage and the second voltage; and to output a k-th gate signal and a k-th carry signal.

公开(公告)号：US20170343868A1

公开(公告)日：2017-11-30

申请号：US15381138

申请日：2016-12-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kwihyun KIM ,  Jongjae LEE ,  Junghwan HWANG ,  Jongdo KEUM ,  Yoonsik PARK ,  Hongmin YOON

IPC: G02F1/1343 ,  G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1368

Abstract: A display apparatus includes a first substrate, a first dummy substrate on the first substrate, and a second dummy substrate extending from the first dummy substrate and bent. The second dummy substrate is on different side surfaces of the first substrate in a first direction. The display apparatus also includes a plurality of pixels on the first dummy substrate, a gate driver on the second dummy substrate and connected to the pixels, and a data driver connected to one side of the first dummy substrate in a second direction crossing the first direction and connected to the pixels.