公开(公告)号：US20240136368A1

公开(公告)日：2024-04-25

申请号：US18402379

申请日：2024-01-02

Applicant: Samsung Display Co., Ltd.

Inventor： Seon Young CHOI ,  Jae Hyung CHO ,  Jee Hoon SIM ,  Jun Ki JEONG

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: H01L27/1248 ,  G02F1/133345 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/156

Abstract: An embodiment of a display device includes a substrate, a semiconductor layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a first storage electrode, a first interlayer insulating layer, a second interlayer insulating layer, a data line, and a driving voltage line. The semiconductor layer is disposed on the substrate. The first gate insulating layer is disposed on the semiconductor layer. The gate electrode is positioned on the first insulating layer. The second gate insulating layer is disposed on the gate electrode. The first storage electrode is positioned on the second gate insulating layer. The first interlayer insulating layer is disposed on the first storage electrode and has an opening surrounding the semiconductor layer, the gate electrode, and the first storage electrode. The second interlayer insulating layer is disposed on the first interlayer insulating layer and fills the opening. The data line and the driving voltage line are positioned on the second interlayer insulating layer. The semiconductor layer, the gate electrode, and the storage electrode are included in a pixel region. The display device includes a plurality of pixel regions. The data line and the driving voltage line cross the pixel circuit region. A portion of the semiconductor layer is in contact with the second interlayer insulating that fills the opening.

公开(公告)号：US20240234445A9

公开(公告)日：2024-07-11

申请号：US18402379

申请日：2024-01-02

Applicant: Samsung Display Co., Ltd.

Inventor： Seon Young CHOI ,  Jae Hyung CHO ,  Jee Hoon SIM ,  Jun Ki JEONG

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: H01L27/1248 ,  G02F1/133345 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/156

Abstract: An embodiment of a display device includes a substrate, a semiconductor layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a first storage electrode, a first interlayer insulating layer, a second interlayer insulating layer, a data line, and a driving voltage line. The semiconductor layer is disposed on the substrate. The first gate insulating layer is disposed on the semiconductor layer. The gate electrode is positioned on the first insulating layer. The second gate insulating layer is disposed on the gate electrode. The first storage electrode is positioned on the second gate insulating layer. The first interlayer insulating layer is disposed on the first storage electrode and has an opening surrounding the semiconductor layer, the gate electrode, and the first storage electrode. The second interlayer insulating layer is disposed on the first interlayer insulating layer and fills the opening. The data line and the driving voltage line are positioned on the second interlayer insulating layer. The semiconductor layer, the gate electrode, and the storage electrode are included in a pixel region. The display device includes a plurality of pixel regions. The data line and the driving voltage line cross the pixel circuit region. A portion of the semiconductor layer is in contact with the second interlayer insulating that fills the opening.

公开(公告)号：US20220310671A1

公开(公告)日：2022-09-29

申请号：US17519485

申请日：2021-11-04

Applicant: Samsung Display Co., Ltd.

Inventor： Seon Young CHOI ,  Jae Hyung CHO ,  Jee Hoon SIM ,  Jun Ki JEONG

IPC: H01L27/12

Abstract: An embodiment of a display device includes a substrate, a semiconductor layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a first storage electrode, a first interlayer insulating layer, a second interlayer insulating layer, a data line, and a driving voltage line. The semiconductor layer is disposed on the substrate. The first gate insulating layer is disposed on the semiconductor layer. The gate electrode is positioned on the first insulating layer. The second gate insulating layer is disposed on the gate electrode. The first storage electrode is positioned on the second gate insulating layer. The first interlayer insulating layer is disposed on the first storage electrode and has an opening surrounding the semiconductor layer, the gate electrode, and the first storage electrode. The second interlayer insulating layer is disposed on the first interlayer insulating layer and fills the opening. The data line and the driving voltage line are positioned on the second interlayer insulating layer. The semiconductor layer, the gate electrode, and the storage electrode are included in a pixel region. The display device includes a plurality of pixel regions. The data line and the driving voltage line cross the pixel circuit region. A portion of the semiconductor layer is in contact with the second interlayer insulating that fills the opening.