公开(公告)号：US10360834B2

公开(公告)日：2019-07-23

申请号：US15602692

申请日：2017-05-23

Applicant: Samsung Display Co., Ltd.

Inventor： Wonho Kim ,  Sungman Kim ,  Hyeonhwan Kim ,  Seongsu Lim ,  Sangjin Jeon

IPC: G11C19/00 ,  G09G3/20 ,  G09G3/36 ,  G02F1/1345

Abstract: A display substrate includes a first substrate having a display area and a non-display area, a plurality of pixels at the display area, and a gate driving circuit at the non-display area and including an output transistor including a channel region, an insulation layer covering the output transistor, and a capacitor on the insulation layer, electrically connected to the output transistor, and including a first capacitor electrode on the insulation layer, overlapping the channel region of the output transistor, and electrically connected to a first electrode of the output transistor, a first protection layer covering the first capacitor electrode, and a second capacitor electrode on the first protection layer, overlapping the channel region of the output transistor, and electrically connected to a gate electrode of the output transistor.

公开(公告)号：US20170343865A1

公开(公告)日：2017-11-30

申请号：US15602692

申请日：2017-05-23

Applicant: Samsung Display Co., Ltd.

Inventor： Wonho Kim ,  Sungman Kim ,  Hyeonhwan Kim ,  Seongsu Lim ,  Sangjin Jeon

IPC: G02F1/1343 ,  G02F1/1368 ,  G09G3/36 ,  G09G3/20 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: G09G3/2007 ,  G02F1/13454 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2380/02 ,  G11C19/28

Abstract: A display substrate includes a first substrate having a display area and a non-display area, a plurality of pixels at the display area, and a gate driving circuit at the non-display area and including an output transistor including a channel region, an insulation layer covering the output transistor, and a capacitor on the insulation layer, electrically connected to the output transistor, and including a first capacitor electrode on the insulation layer, overlapping the channel region of the output transistor, and electrically connected to a first electrode of the output transistor, a first protection layer covering the first capacitor electrode, and a second capacitor electrode on the first protection layer, overlapping the channel region of the output transistor, and electrically connected to a gate electrode of the output transistor.