Abstract:
A thin film transistor array panel is provided. The thin film transistor array panel includes a substrate, a seed layer positioned on the substrate, and a semiconductor layer positioned on the seed layer, wherein a lattice mismatch between the seed layer and the semiconductor layer is equal to or less than 1.4%.
Abstract:
A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr).