Abstract:
A stage includes an output unit configured to supply a scan signal to an output terminal according to voltages of first and second nodes; a first driver configured to control the voltages of the first and second nodes so that when a start signal or an output signal of a previous stage is supplied to a first input terminal, the scan signal is supplied from the output unit; and a second driver configured to control the voltages of the first and second nodes, corresponding to signals supplied to a second input terminal, a fourth input terminal and a fifth input terminal, wherein the second driver comprises eighth and ninth transistors coupled in series between the output terminal and the second node, and wherein a gate electrode of the eighth transistor is coupled to the first node, and a gate electrode of the ninth transistor is coupled to the fourth input terminal.
Abstract:
A pixel includes first through sixth transistors and an organic light emitting diode. The first transistor includes a gate electrode connected to a first node, a first electrode, and a second electrode connected to a second node. The second transistor provides a data signal to the first node in response to a scan signal. The third transistor provides a first power voltage to the first transistor in response to an emission control signal. The fourth transistor provides a reference voltage to the first node in response to a voltage control signal. The fifth transistor provides the reference voltage to the first node in response to an initialization control signal. The sixth transistor provides an initialization voltage to the second node in response to the initialization control signal. The organic light emitting diode is connected between the second node and a second power voltage.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract:
A pixel includes an organic light emitting diode, a first driver and a second driver. The second driver controls an amount of current supplied from a first power source to the organic light emitting diode, corresponding to a previous data signal. The first driver stores a current data signal supplied from a data line and supplies the previous data signal to the second driver. In the pixel, the second driver includes a sixth transistor coupled between an initialization power source and a first node coupled to a gate electrode of a first transistor, the sixth transistor being configured to turn on when a first control signal is supplied; and a seventh transistor coupled between the first power source and a second node commonly coupled to the first and second drivers, the seventh transistor being configured to turn on when the first control signal is supplied.
Abstract:
An organic light emitting diode display including a substrate, a scan line transferring a scan signal, a compensation control line transferring a compensation control signal, an operation control line applying an operation control signal, a data line and a driving voltage line transferring a data signal and a driving voltage, respectively, a switching thin film transistor (TFT) connected to the scan line and the data line, a compensation TFT and an initialization TFT connected to the compensation control line, an operation control TFT connected to the operation control line and the switching TFT, a driving TFT connected to the driving voltage line, an organic light emitting diode connected to a drain electrode of the driving TFT, and a hold capacitor connected between a source electrode of the operation control TFT and a gate electrode of the initialization TFT.
Abstract:
An organic light emitting display capable of improving display quality. The organic light emitting display includes a data driver for supplying bias power supply to data lines in a first period of one frame, for supplying reference power supply in a second period, and for supplying data signals in a fourth period, a scan driver for sequentially supplying scan signals to scan lines in the fourth period, pixels positioned at intersections of the scan lines and the data lines, and a first control line, a second control line, a third control line, and a fourth control line commonly coupled to the pixels. Each of the pixels includes a first capacitor for previously charging voltages corresponding to the data signals and a second capacitor charged by a voltage of the first capacitor in a third period between the second period and the fourth period.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract:
A static electricity prevention circuit of a display device including: a driving circuit configured to drive a display unit that displays an image, at least one clock signal wire configured to transmit a clock signal to the driving circuit, at least one transistor electrically coupled to the clock signal wire, and at least one capacitor including a first electrode coupled to a source electrode and to a drain electrode of the transistor, and a second electrode configured to be maintained at a voltage.
Abstract:
A stage circuit and a scan driver, the stage circuit including a switch unit configured to selectively electrically couple a first node to one of a first input terminal and a second input terminal, a first driver coupled to the first node, to a second node, to a third node, to a first clock terminal, and to a second clock terminal, and a second driver coupled to the second node, to the third node, to a third clock terminal, and to a common terminal, and configured to output a scan signal to an output terminal.