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公开(公告)号:US20210118368A1
公开(公告)日:2021-04-22
申请号:US17021935
申请日:2020-09-15
Applicant: Samsung Display Co., Ltd.
Inventor: Hai-Jung IN , Ji-Hyun KA , Won Kyu KWAK , Ki Myeong EOM , Kyonghwan OH
IPC: G09G3/3258 , G09G3/3266 , G09G3/3275
Abstract: A display panel of an organic light emitting diode (OLED) display device having a display region includes a plurality of first pixels located at an upper half of the display region, a plurality of second pixels located at a lower half of the display region, a plurality of first data lines extending in a first direction, and coupled to the plurality of first pixels, a plurality of second data lines extending in the first direction, disposed alternately with the plurality of first data lines along a second direction crossing the first direction, and coupled to the plurality of second pixels, and a demultiplexing circuit configured to selectively couple a plurality of data channels of a data driver of the OLED display device to the plurality of first data lines or the plurality of second data lines.
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公开(公告)号:US20210335988A1
公开(公告)日:2021-10-28
申请号:US17234180
申请日:2021-04-19
Applicant: Samsung Display Co., LTD.
Inventor: Nuree UM , Wonkyu KWAK , Kyung-Hoon KIM , Mihae KIM , Jaewon KIM , Hyungjun PARK , Changsoo PYON , Kyonghwan OH , Junwon CHOI
Abstract: A display device includes a substrate including a display region, a hole, and a hole edge region surrounding the hole, first data lines disposed on the substrate, extending in a first direction, arranged in a second direction intersecting the first direction in the display region, and bypassing the hole along the hole edge region, and second data lines disposed on the substrate, extending in the first direction, alternately arranged with the first data lines in the second direction in the display region, and bypassing the hole along the hole edge region. At least one of the first data lines intersects at least one of the second data lines such that the first data lines are disposed adjacent to each other and the second data lines are disposed adjacent to each other in the hole edge region.
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公开(公告)号:US20210343234A1
公开(公告)日:2021-11-04
申请号:US17115256
申请日:2020-12-08
Applicant: Samsung Display Co., Ltd.
Inventor: Youngsoo YOON , Wonkyu KWAK , Jihyun KA , Jisu NA , Kyonghwan OH , Yunkyeong IN , Haijung IN , Hyunji CHA
IPC: G09G3/3225 , H01L27/32 , G09G3/3266 , G09G3/3275
Abstract: A pixel includes an organic light-emitting diode; a first transistor that receives a signal in response to a voltage applied to a first node and controls an amount of current flowing from a second node electrically connected to a power supply voltage line to the organic light-emitting diode; a fourth transistor electrically connected between the first node and a first initializing voltage line; and a bias capacitor electrically connected between the second node and a light-emission control line, the bias capacitor including a first capacitor electrode and a second capacitor electrode. The first capacitor electrode of the bias capacitor and a semiconductor layer of the first transistor are disposed on a same layer, and the second capacitor electrode of the bias capacitor and a second portion included in a gate electrode of the fourth transistor are disposed on a same layer.
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公开(公告)号:US20250072247A1
公开(公告)日:2025-02-27
申请号:US18949140
申请日:2024-11-15
Applicant: Samsung Display Co., Ltd.
Inventor: Nuree UM , Wonkyu KWAK , Kyung-Hoon KIM , Mihae KIM , Jaewon KIM , Hyungjun PARK , Changsoo PYON , Kyonghwan OH , Junwon CHOI
IPC: H10K59/131 , H10K77/10
Abstract: A display device includes a substrate including a display region, a hole, and a hole edge region surrounding the hole, first data lines disposed on the substrate, extending in a first direction, arranged in a second direction intersecting the first direction in the display region, and bypassing the hole along the hole edge region, and second data lines disposed on the substrate, extending in the first direction, alternately arranged with the first data lines in the second direction in the display region, and bypassing the hole along the hole edge region. At least one of the first data lines intersects at least one of the second data lines such that the first data lines are disposed adjacent to each other and the second data lines are disposed adjacent to each other in the hole edge region.
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公开(公告)号:US20230145269A1
公开(公告)日:2023-05-11
申请号:US17979975
申请日:2022-11-03
Applicant: Samsung Display Co., LTD.
Inventor: Kyonghwan OH , Chulkyu KANG , Jintae JEONG , Kimyeong EOM , Jaehoon LEE , Soon-Gi KWON , Yangwan KIM , Minku LEE
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0819 , G09G2300/0852 , G09G2300/0426
Abstract: A pixel of a display apparatus includes a light emitting element, a first transistor, a second transistor, a first capacitor, and a second capacitor. The first transistor applies a driving current to the light emitting element. The second transistor transmits a data voltage. The first capacitor includes a first end electrically connected to a control electrode of the first transistor, and a second end electrically connected to an output electrode of the second transistor. The second capacitor includes a first end electrically connected to the output electrode of the second transistor, and a second end electrically connected to an output electrode of the first transistor.
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公开(公告)号:US20230119632A1
公开(公告)日:2023-04-20
申请号:US17970261
申请日:2022-10-20
Applicant: Samsung Display Co., Ltd.
Inventor: Soongi KWON , Wonkyu KWAK , Jihyun KA , Chulkyu KANG , Yangwan KIM , Kimyeong EOM , Kyonghwan OH , Minku LEE , Jintae JEONG
IPC: G09G3/3233
Abstract: A pixel capable of adjusting a threshold voltage of a driving transistor, the pixel including: a display element configured to emit light during an emission period and including an anode and a cathode, the first transistor including an upper gate and a lower gate and configured to control a magnitude of a driving current flowing to the display element, a storage capacitor connected to the upper gate of the first transistor, and a second transistor configured to be turned on during a data writing period to transmit a data voltage to the first transistor, wherein a lower gate-source voltage of the first transistor has a first voltage level in the data writing period and a second voltage level in the emission period.
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