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    Transistor panel having a good insulation property and a manufacturing method thereof
    1.
    发明授权
    Transistor panel having a good insulation property and a manufacturing method thereof 有权

    公开(公告)号：US10170626B2

    公开(公告)日：2019-01-01

    申请号：US15412278

    申请日：2017-01-23

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Kwang Soo Lee ,  Shin Hyuk Yang ,  Doo Hyun Kim ,  Jee Hoon Kim

    IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L27/32

    Abstract: A transistor panel includes a channel region including an oxide of a first metal, a source region and a drain region, each including the first metal, wherein the channel region is disposed between the source and drain regions, and wherein the channel region is connected to the source and drain regions, an insulation layer disposed on the channel region, an upper electrode disposed on the insulation layer, an interlayer insulation layer disposed on the upper electrode, the source region and the drain region, and a barrier layer including a first portion disposed between the interlayer insulation layer and each of the source and drain regions, wherein the first portion of the barrier layer contacts each of the source and drain regions. The upper electrode and the barrier layer each comprise a second metal.

    Transistor, manufacturing method thereof, and display device including the same
    3.
    发明授权
    Transistor, manufacturing method thereof, and display device including the same 有权

    公开(公告)号：US10224435B2

    公开(公告)日：2019-03-05

    申请号：US15805594

    申请日：2017-11-07

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jee Hoon Kim ,  Shin Hyuk Yang ,  Kwang Soo Lee

    IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32

    Abstract: An exemplary embodiment of the present disclosure provides a transistor including: a drain electrode; a first insulating member on the drain electrode and having a tilted side wall; a source electrode on the first insulating member; an active member covering the tilted side wall of the first insulating member, a side wall of the source electrode, and a side wall of the drain electrode; a second insulating member covering the source electrode and the active member; and a gate electrode on the second insulating member and overlapping the active member, wherein the active member defines a first channel region adjacent to the drain electrode and a second channel region adjacent to the source electrode, and wherein a width of the first channel region may be greater than that of the second channel region.

    Thin film transistor array substrate and fabricating method thereof
    4.
    发明授权
    Thin film transistor array substrate and fabricating method thereof 有权

    公开(公告)号：US10411046B2

    公开(公告)日：2019-09-10

    申请号：US15601338

    申请日：2017-05-22

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Jee Hoon Kim ,  Shin Hyuk Yang ,  Yong Hoon Won ,  Kwang Soo Lee

    IPC: H01L27/12 ,  H01L27/32

    Abstract: A thin film transistor array substrate includes: a base substrate; a first transistor including a first electrode on a surface of the base substrate, a spacer, on the first electrode, a second electrode on the spacer, a first active layer contacting the first electrode, the spacer and the second electrode, and a first gate electrode opposite to the first active layer with a first insulating layer interposed therebetween; a storage capacitor including a first storage electrode integrally connected to the first electrode or the second electrode, and a second storage electrode opposite to the first storage electrode with the first insulating layer interposed therebetween, where the second storage electrode is integrally connected to the first gate electrode; and a second transistor electrically connected to the storage capacitor, where the second transistor includes a second active layer extending in a direction intersecting the base substrate.

    Display device
    7.
    发明授权
    Display device 有权

    公开(公告)号：US11948947B2

    公开(公告)日：2024-04-02

    申请号：US16896513

    申请日：2020-06-09

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Kwang Soo Lee ,  Hyun Kim ,  Kap Soo Yoon ,  Su Jung Jung

    IPC: H01L27/12

    CPC classification number: H01L27/1251 ,  H01L27/124 ,  H01L27/1288

    Abstract: A display device includes pixel circuits disposed in a display area and a driving circuit disposed in the peripheral area. The driving circuit includes a first transistor and each pixel circuit includes a second transistor. The first transistor includes a first active pattern disposed on the substrate, a first gate insulation layer having a first outer portion disposed on the first active pattern, and a first gate electrode disposed on the first gate insulation layer. The second transistor includes a second active pattern disposed on the substrate, a second gate insulation layer having a second outer portion disposed on the second active pattern, and a second gate electrode disposed on the second gate insulation layer. The first outer portion doesn't overlap the first gate electrode and has a first width. The second outer portion doesn't overlap the second gate electrode and has a second width smaller than the first width.

    Thin film transistor array substrate and fabricating method thereof
    9.
    发明授权
    Thin film transistor array substrate and fabricating method thereof 有权

    公开(公告)号：US10651210B2

    公开(公告)日：2020-05-12

    申请号：US16524606

    申请日：2019-07-29

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Jee Hoon Kim ,  Shin Hyuk Yang ,  Yong Hoon Won ,  Kwang Soo Lee

    IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786

    Abstract: A thin film transistor array substrate includes: a base substrate; a first transistor including a first electrode on a surface of the base substrate, a spacer, on the first electrode, a second electrode on the spacer, a first active layer contacting the first electrode, the spacer and the second electrode, and a first gate electrode opposite to the first active layer with a first insulating layer interposed therebetween; a storage capacitor including a first storage electrode integrally connected to the first electrode or the second electrode, and a second storage electrode opposite to the first storage electrode with the first insulating layer interposed therebetween, where the second storage electrode is integrally connected to the first gate electrode; and a second transistor electrically connected to the storage capacitor, where the second transistor includes a second active layer extending in a direction intersecting the base substrate.

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