公开(公告)号：US20250095592A1

公开(公告)日：2025-03-20

申请号：US18627597

申请日：2024-04-05

Applicant: Samsung Display Co., LTD.

Inventor： Jong Woo JIN ,  Ki Hwan KIM ,  Tae Young CHOI

IPC: G09G3/3291

Abstract: A display device including a light-emitting element, and a first transistor connected between a driving voltage line and the light-emitting element, the first transistor including a first gate electrode and a second gate electrode that face each other, and an active layer between the first gate electrode and the second gate electrode. The display device further includes a first data line connected to the first gate electrode of the first transistor, a second data line connected to the second gate electrode of the first transistor, and a data driver connected to the first data line and the second data line. The data driver applies a first data voltage to the first data line and applies a second data voltage having a different magnitude from the first data voltage to the second data line. The magnitude of the second data voltage varies depending on the magnitude of the first data voltage.

公开(公告)号：US20210384283A1

公开(公告)日：2021-12-09

申请号：US17338461

申请日：2021-06-03

Applicant: Samsung Display Co., Ltd.

Inventor： Hyung Gi JUNG ,  Ki Hwan KIM ,  Beom Jin KIM ,  Soon Chang YEON ,  Sung Hyun LEE ,  Jae Min LEE ,  Jae Young LEE ,  You Mee HYUN

IPC: H01L27/32 ,  H01L51/52

Abstract: A display device includes: a first base on which a display area and a non-display area are defined; a light-emitting element on the first base and in the display area; a second base facing the first base and above the light-emitting element; a color filter on a surface of the second base that faces the first base and overlapping the light-emitting element; a wavelength conversion pattern on the color filter; a sealing member in the non-display area between the first base and the second base; and a sink pattern in the non-display area, wherein the sink pattern is between the sealing member and the display area when viewed from a plan view.

公开(公告)号：US20160218197A1

公开(公告)日：2016-07-28

申请号：US14956056

申请日：2015-12-01

Applicant: Samsung Display Co., Ltd.

Inventor： Myung Kwan RYU ,  Ki Hwan KIM ,  Kap Soo YOON ,  Hyeon Jun LEE ,  Jeong Uk HEO

IPC: H01L29/66 ,  H01L21/306 ,  H01L29/417 ,  H01L21/324 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L29/66742 ,  H01L21/324 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78666 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/7869

Abstract: There are provided a method of manufacturing a thin film transistor and a display including a thin film transistor.The method of manufacturing a thin film transistor includes forming a barrier layer cm a substrate, forming a semiconductor layer on the barrier layer, forming a gate insulating layer on the semiconductor layer, forming a gate electrode on the gate insulating layer, forming an offset region on an external surface of the gate electrode through a plasma heat treatment process or an annealing process, etching, an offset region of the gate electrode, etching a gate insulating layer except for a portion of the gate insulating layer, positioned below the gate electrode, forming an interlayer insulating layer on the gate electrode, and etching, the interlayer insulating layer to form a source electrode and a drain electrode.

Abstract translation: 提供了制造薄膜晶体管的方法和包括薄膜晶体管的显示器。 制造薄膜晶体管的方法包括在衬底上形成衬底，在阻挡层上形成半导体层，在半导体层上形成栅极绝缘层，在栅极绝缘层上形成栅电极，形成偏移区域 通过等离子体热处理工艺或退火工艺在栅电极的外表面上蚀刻栅电极的偏移区域，蚀刻位于栅电极下方的栅绝缘层以外的栅极绝缘层， 在所述栅电极上形成层间绝缘层，并蚀刻所述层间绝缘层以形成源电极和漏电极。

公开(公告)号：US20230263017A1

公开(公告)日：2023-08-17

申请号：US17938658

申请日：2022-10-06

Applicant: Samsung Display Co., LTD. ,  Industry-University Cooperation Foundation Hanyang University ERICA Campus

Inventor： JOON SEOK PARK ,  Saeroonter Oh ,  Ki Hwan KIM ,  MYOUNGHWA KIM ,  Min Goo KIM ,  JUN HYUNG LIM

IPC: H01L27/32 ,  H01L51/56

CPC classification number: H01L27/3258 ,  H01L51/56 ,  H01L2227/323

Abstract: A display device includes: a substrate; a barrier layer on the substrate, and including: a trench area recessed in a direction towards the substrate; and a flat area surrounding the trench area, and having a flat upper surface; and a switching transistor and a driving transistor on the barrier layer. The switching transistor includes: a first active layer on the barrier layer, at least a portion of the first active layer being located at the trench area, the first active layer including a channel area, and a source area and a drain area at opposite sides of the channel area; a first gate electrode on the first active layer; and a first upper electrode and a second upper electrode on and connected to the first active layer.