公开(公告)号：US20230402012A1

公开(公告)日：2023-12-14

申请号：US18077405

申请日：2022-12-08

Applicant: Samsung Display Co., Ltd.

Inventor： JONGHEE KIM ,  BOGYEONG KIM ,  TAK-YOUNG LEE ,  BOYONG CHUNG ,  BYUNGSEOK CHOI

IPC: G09G3/3266 ,  G09G3/3233

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G3/3275

Abstract: A gate driver includes stages. Each stage includes: a first output part for outputting a carry signal in response to a voltage of a first node; a first input part for controlling the voltage of the first node in response to a previous carry signal; a second input part for controlling the voltage of the first node in response to a first next carry signal; a second output part for outputting a scan signal in response to the voltage of the first node; a third output part for outputting a sensing signal in response to the voltage of the first node; and a scan signal control part for applying a first low power voltage to an output terminal of the second output part to which the scan signal is output in response to a second next carry signal of which a pulse is generated before the first next carry signal.

公开(公告)号：US20230178031A1

公开(公告)日：2023-06-08

申请号：US17864764

申请日：2022-07-14

Applicant: Samsung Display Co., Ltd.

Inventor： BOYONG CHUNG ,  JONGHEE KIM ,  HYUK KIM ,  JOOSUN YOON ,  TAK-YOUNG LEE

IPC: G09G3/3291

CPC classification number: G09G3/3291 ,  G09G2330/028 ,  G09G2310/0272

Abstract: A display device includes a display panel including a plurality of pixels, a gate driver which provides a gate signal to corresponding pixels of the plurality of pixels, a data driver which provides a data voltage to the corresponding pixels of the plurality of pixels, a power voltage generator which provides a pixel power voltage to each of the plurality of pixels, and provides a gate power voltage to the gate driver, and a controller which provides a gate control signal to the gate driver. The pixel power voltage, the data voltage, and the gate control signal sequentially have a ground voltage level in response to a power-off signal.

公开(公告)号：US20240161701A1

公开(公告)日：2024-05-16

申请号：US18212512

申请日：2023-06-21

Applicant: Samsung Display Co., Ltd.

Inventor： HYUK KIM ,  BOYONG CHUNG ,  JONGHEE KIM ,  DOO-YOUNG LEE ,  TAK-YOUNG LEE ,  SANG-UK LIM

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2300/0426 ,  G09G2310/08 ,  G09G2320/0233

Abstract: A display device includes a display panel and a gate driver. The gate driver includes an N-th stage (where N is a natural number) configured to output an N-th scan gate signal and output an N-th sensing gate signal. The N-th stage includes a compensator, a sixth transistor including a control electrode connected to a first node, and a ninth transistor including a control electrode connected to the first node. In a variable frequency mode, the compensator outputs a second signal to the first node in response to a first signal, and the sixth transistor does not output the N-th scan gate signal when the ninth transistor outputs the N-th sensing gate signal based on the sensing clock signal, the voltage of the first node, and the voltage of the second node.

公开(公告)号：US20240078962A1

公开(公告)日：2024-03-07

申请号：US18143011

申请日：2023-05-03

Applicant: Samsung Display Co., Ltd.

Inventor： HYUK KIM ,  JONGHEE KIM ,  DOO-YOUNG LEE ,  CHANG-SOO LEE ,  SANG-UK LIM ,  BOYONG CHUNG

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/0267 ,  G09G2310/08 ,  H01L27/124

Abstract: Provided is a gate driving circuit comprising an N-th stage and an N+1-th stage. The N-th stage outputs an N-th scan gate signal based on an N-th scan clock signal, a voltage of a QN node, and a voltage of a QBN node and to output an N-th carry signal based on an N-th carry clock signal, the voltage of the QN node, and the voltage of the QBN node. The N+1-th stage outputs an N+1-th scan gate signal based on an N+1-th scan clock signal, a voltage of a QN+1 node, and the voltage of the QBN node and an N+1-th carry signal based on an N+1-th carry clock signal, the voltage of the QN+1 node, and the voltage of the QBN node. The N-th stage and the N+1-th stage share an inverting circuit. The inverting circuit controls the QBN node based on a third signal. N is a positive integer.

公开(公告)号：US20240005879A1

公开(公告)日：2024-01-04

申请号：US18132377

申请日：2023-04-08

Applicant: Samsung Display Co., LTD.

Inventor： JONGHEE KIM ,  BOGYEONG KIM ,  TAK-YOUNG LEE ,  BOYONG CHUNG ,  BYUNGSEOK CHOI

IPC: G09G3/3291 ,  G09G3/3266

CPC classification number: G09G3/3291 ,  G09G3/3266 ,  G09G2310/08 ,  G09G2330/021

Abstract: A display device includes a display panel including pixels, a gate driver applying gate signals to the pixels, a data driver applying data voltages to the pixels, sensing selected pixels among the pixels, and applying the data voltages to the selected pixels after the selected pixels are sensed in one frame, and a timing controller controlling the gate driver and the data driver.

公开(公告)号：US20240096283A1

公开(公告)日：2024-03-21

申请号：US18197988

申请日：2023-05-16

Applicant: Samsung Display Co., LTD.

Inventor： SANG-UK LIM ,  JONGHEE KIM ,  HYUK KIM ,  SEUNGHYUN PARK ,  DOO-YOUNG LEE ,  BOYONG CHUNG

IPC: G09G3/3258 ,  G09G3/20 ,  G09G3/3233 ,  G09G3/3275

CPC classification number: G09G3/3258 ,  G09G3/2096 ,  G09G3/3233 ,  G09G3/3275 ,  G09G2300/0842 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0257 ,  G09G2320/045 ,  G09G2330/021 ,  G09G2330/028

Abstract: A display device includes a display panel including pixels, a gate driver which sequentially applies scan signals to pixel rows including the pixels at a scan frequency, a data driver which applies data voltages to the pixels, a power voltage generator which applies a power voltage to the pixels, and a timing controller which sets a ripple frequency of the power voltage to deviate from the scan frequency by a predetermined reference ratio or more.