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公开(公告)号：US08067987B2
公开(公告)日：2011-11-29
申请号：US12682352
申请日：2008-10-10
申请人： Padmanava Sen , Saikat Sarkar , Stephane Pinel , Joy Laskar , Francesco Barale
发明人： Padmanava Sen , Saikat Sarkar , Stephane Pinel , Joy Laskar , Francesco Barale
IPC分类号： H03L7/00
CPC分类号： H03K23/483 , H03B5/1852 , H03B21/02 , H03J3/185 , H03L7/099 , H03L7/193 , H03L7/24
摘要： A voltage controlled oscillator-phase lock loop (VCO-PLL) system includes a voltage controlled oscillator (VCO) system implementing four-channel architecture, such that two bands support two channels; a phase-locked-loop (PLL) system; and a mixer system. The VCO system further includes a control circuit; a first cross-coupled oscillator system adapted to receive a source voltage; a second cross-coupled oscillator system adapted to receive the source voltage; and a plurality of isolation buffer systems adapted to protect the first and second cross-coupled oscillator systems.
摘要翻译： 压控振荡器锁相环（VCO-PLL）系统包括实施四通道架构的压控振荡器（VCO）系统，使得两个频带支持两个通道; 锁相环（PLL）系统; 和搅拌机系统。 VCO系统还包括控制电路; 适于接收源电压的第一交叉耦合振荡器系统; 适于接收源电压的第二交叉耦合振荡器系统; 以及适于保护第一和第二交叉耦合振荡器系统的多个隔离缓冲器系统。
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公开(公告)号：US20100214026A1
公开(公告)日：2010-08-26
申请号：US12682352
申请日：2008-10-10
申请人： Padmanava Sen , Saikat Sarkar , Stephane Pinel , Joy Laskar , Francesco Barale
发明人： Padmanava Sen , Saikat Sarkar , Stephane Pinel , Joy Laskar , Francesco Barale
IPC分类号： H03L7/099
CPC分类号： H03K23/483 , H03B5/1852 , H03B21/02 , H03J3/185 , H03L7/099 , H03L7/193 , H03L7/24
摘要： A voltage controlled oscillator-phase lock loop (VCO-PLL) system includes a voltage controlled oscillator (VCO) system implementing four-channel architecture, such that two bands support two channels; a phase-locked-loop (PLL) system; and a mixer system. The VCO system further includes a control circuit; a first cross-coupled oscillator system adapted to receive a source voltage; a second cross-coupled oscillator system adapted to receive the source voltage; and a plurality of isolation buffer systems adapted to protect the first and second cross-coupled oscillator systems.
摘要翻译： 压控振荡器锁相环（VCO-PLL）系统包括实施四通道架构的压控振荡器（VCO）系统，使得两个频带支持两个通道; 锁相环（PLL）系统; 和搅拌机系统。 VCO系统还包括控制电路; 适于接收源电压的第一交叉耦合振荡器系统; 适于接收源电压的第二交叉耦合振荡器系统; 以及适于保护第一和第二交叉耦合振荡器系统的多个隔离缓冲器系统。
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公开(公告)号：US07489201B2
公开(公告)日：2009-02-10
申请号：US11801363
申请日：2007-05-09
申请人： Saikat Sarkar , Padmanava Sen , Stephane Pinel , Joy Laskar
发明人： Saikat Sarkar , Padmanava Sen , Stephane Pinel , Joy Laskar
IPC分类号： H03F3/04
CPC分类号： H03F1/22 , H03F3/191 , H03F3/60 , H03F2200/181 , H03F2200/222 , H03F2200/318 , H03F2200/387
摘要： Disclosed is a gain boosting technique for use with millimeter-wave cascode amplifiers. The exemplary technique may be implemented using a 0.18 μm SiGe process (FT=140 GHz). It has also been shown that the technique is effective for CMOS processes with comparable FT. An exemplary gain-enhanced cascode stage was measured to have higher than 9 dB gain with a 1-dB bandwidth above 6 GHz with a DC power consumption of 13 mW. In addition, one cascode stage without gain boosting may be cascaded with two gain-boosted cascode amplifier stages to implement a three-stage LNA. The measured stable gain is higher than 24 dB at 60 GHz with a 3-dB bandwidth of 3.1 GHz for 25 mW of DC power consumption. It is believed that this is the first 60 GHz LNA with a higher than 20 dB gain using a 0.18 μm SiGe process.
摘要翻译： 公开了一种用于毫米波共源共栅放大器的增益技术。 可以使用0.18μmSiGe工艺（FT = 140GHz）来实现示例性技术。 还已经表明，该技术对于具有相当的FT的CMOS工艺是有效的。 测量一个示例性的增益增益共源共栅级，具有高于9 dB的增益，1 GHz带宽高于6 GHz，直流功耗为13 mW。 另外，没有增益升压的一个级联级可以与两个增益升压的共源共栅放大器级级联以实现三级LNA。 测量的稳定增益在60 GHz时高于24 dB，对于25 mW的直流功耗，3.1 GHz的3 dB带宽。 相信这是使用0.18 mum SiGe工艺的第一个60 GHz LNA，具有高于20 dB的增益。
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公开(公告)号：US20070273445A1
公开(公告)日：2007-11-29
申请号：US11801363
申请日：2007-05-09
申请人： Saikat Sarkar , Padmanava Sen , Stephane Pinel , Joy Laskar
发明人： Saikat Sarkar , Padmanava Sen , Stephane Pinel , Joy Laskar
IPC分类号： H03G3/00
CPC分类号： H03F1/22 , H03F3/191 , H03F3/60 , H03F2200/181 , H03F2200/222 , H03F2200/318 , H03F2200/387
摘要： Disclosed is a gain boosting technique for use with millimeter-wave cascode amplifiers. The exemplary technique may be implemented using a 0.18 μm SiGe process (FT=140 GHz). It has also been shown that the technique is effective for CMOS processes with comparable FT. An exemplary gain-enhanced cascode stage was measured to have higher than 9 dB gain with a 1-dB bandwidth above 6 GHz with a DC power consumption of 13 mW. In addition, one cascode stage without gain boosting may be cascaded with two gain-boosted cascode amplifier stages to implement a three-stage LNA. The measured stable gain is higher than 24 dB at 60 GHz with a 3-dB bandwidth of 3.1 GHz for 25 mW of DC power consumption. It is believed that this is the first 60 GHz LNA with a higher than 20 dB gain using a 0.18 μm SiGe process.
摘要翻译： 公开了一种用于毫米波共源共栅放大器的增益技术。 可以使用0.18μmSiGe工艺（F> T = 140GHz）来实现示例性技术。 还已经表明，该技术对于具有相当的F T T T的CMOS工艺是有效的。 测量一个示例性的增益增益共源共栅级，具有高于9 dB的增益，1 GHz带宽高于6 GHz，直流功耗为13 mW。 另外，没有增益升压的一个级联级可以与两个增益升压的共源共栅放大器级级联以实现三级LNA。 测量的稳定增益在60 GHz时高于24 dB，对于25 mW的直流功耗，3.1 GHz的3 dB带宽。 相信这是使用0.18 mum SiGe工艺的第一个60 GHz LNA，具有高于20 dB的增益。
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公开(公告)号：US08081948B2
公开(公告)日：2011-12-20
申请号：US12447163
申请日：2007-10-25
申请人： Stephane Pinel , Joy Laskar , David Yeh , Bevin George Perumana , Saikat Sarkar
发明人： Stephane Pinel , Joy Laskar , David Yeh , Bevin George Perumana , Saikat Sarkar
IPC分类号： H04B1/16
CPC分类号： G06G7/12
摘要： An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes.
摘要翻译： 可以实现模拟多吉比特接收机和/或收发机用于使用CMOS（互补金属氧化物半导体）工艺调制的多吉比特正交相移键控（QPSK）的接收和解调。 此外，可以实现模拟多吉比特接收机和/或收发器用于接收和解调多吉比特二进制相移键控（BPSK），最小移位键控（MSK）和/或幅度键控（ASK）信号调制 在CMOS工艺中。
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公开(公告)号：US08605826B2
公开(公告)日：2013-12-10
申请号：US12850481
申请日：2010-08-04
申请人： Eric Juntunen , Stephane Pinel , Joy Laskar , David Yeh , Saikat Sarkar
发明人： Eric Juntunen , Stephane Pinel , Joy Laskar , David Yeh , Saikat Sarkar
CPC分类号： H04B1/16 , H03D7/125 , H03D2200/0074 , H04B1/30
摘要： A receiver system and a demodulator system are configured to receive and demodulate, respectively, multi-gigabit millimeter wave signals being wirelessly transmitted in the unlicensed wireless band near 60 GHz.
摘要翻译： 接收机系统和解调器系统被配置为分别接收和解调在60GHz附近的未经许可的无线频带中无线发送的千兆位毫米波信号。
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公开(公告)号：US20100093299A1
公开(公告)日：2010-04-15
申请号：US12447163
申请日：2007-10-25
申请人： Stephane Pinel , Joy Laskar , David Yeh , Bevin George Perumana , Saikat Sarkar
发明人： Stephane Pinel , Joy Laskar , David Yeh , Bevin George Perumana , Saikat Sarkar
CPC分类号： G06G7/12
摘要： An analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits quadrature phase shift keying (QPSK) modulated using a CMOS (complementary metal-oxide semiconductor) process. Further, an analog multi-gigabit receiver and/or transceiver can be implemented for the reception and demodulation of multi-gigabits binary phase shift keying (BPSK), minimum shift keying (MSK), and/or amplitude shift keying (ASK) signal modulated in CMOS processes.
摘要翻译： 可以实现模拟多吉比特接收机和/或收发机用于使用CMOS（互补金属氧化物半导体）工艺调制的多吉比特正交相移键控（QPSK）的接收和解调。 此外，可以实现模拟多吉比特接收机和/或收发器用于接收和解调多吉比特二进制相移键控（BPSK），最小移位键控（MSK）和/或幅度键控（ASK）信号调制 在CMOS工艺中。
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公开(公告)号：US20130331043A1
公开(公告)日：2013-12-12
申请号：US13494175
申请日：2012-06-12
IPC分类号： H04B1/44
CPC分类号： H04B1/525
摘要： A TX/RX switch includes a first switching device connectable with a power amplifier and a second switching device connectable with a low noise amplifier. Both the first switching device and the second switching device are operating in an ON state in transmit mode to provide substantial linearity including no significant alternating current signal swing across any two nodes of the first switching device and the second switching device in the ON state.
摘要翻译： TX / RX开关包括可与功率放大器连接的第一开关装置和可与低噪声放大器连接的第二开关装置。 第一开关器件和第二开关器件都在发送模式下工作在接通状态，以提供基本上的线性，包括在处于导通状态的第一开关器件和第二开关器件的任何两个节点上没有显着的交流信号摆幅。
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公开(公告)号：US08768270B2
公开(公告)日：2014-07-01
申请号：US13494175
申请日：2012-06-12
IPC分类号： H04B1/44
CPC分类号： H04B1/525
摘要： A TX/RX switch includes a first switching device connectable with a power amplifier and a second switching device connectable with a low noise amplifier. Both the first switching device and the second switching device are operating in an ON state in transmit mode to provide substantial linearity including no significant alternating current signal swing across any two nodes of the first switching device and the second switching device in the ON state.
摘要翻译： TX / RX开关包括可与功率放大器连接的第一开关装置和可与低噪声放大器连接的第二开关装置。 第一开关器件和第二开关器件都在发送模式下工作在接通状态，以提供基本上的线性，包括在处于导通状态的第一开关器件和第二开关器件的任何两个节点上没有显着的交流信号摆幅。
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