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1.发明授权公开(公告)号：US11178755B2
公开(公告)日：2021-11-16
申请号：US16080759
申请日：2017-11-15
摘要： A flexible printed circuit board of the present invention includes an insulating base film and an electrode stacked on a first surface of the base film, in which the electrode includes a low-melting-point metal layer on a surface of the electrode, and a plate- or strip-like rigid member electrically insulated from the electrode is disposed in a region of a second surface of the base film opposite from the electrode.
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公开(公告)号：US10889086B2
公开(公告)日：2021-01-12
申请号：US16636759
申请日：2018-03-20
发明人： Kayo Hashizume , Yoshio Oka , Masamichi Yamamoto , Takashi Kasuga , Yugo Kubo , Hideki Kashihara , Hiroshi Ueda
摘要： A resin film according to one aspect of the present invention is a resin film having polyimide as a main component, the resin film including a modified layer formed in a depth direction from at least one side of the resin film; and a non-modified layer other than the modified layer, wherein a ring-opening rate of an imide ring of the polyimide in the modified layer is higher than a ring-opening rate of an imide ring of the polyimide in the non-modified layer, and an average thickness of the modified layer from the one side of the resin film is greater than or equal to 10 nm and less than or equal to 500 nm.
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公开(公告)号：US12119591B2
公开(公告)日：2024-10-15
申请号：US17649986
申请日：2022-02-04
发明人： Tatsuo Matsuda , Masamichi Yamamoto
IPC分类号： H01B7/08 , H01B7/02 , H01R12/79 , H01R13/6591 , H01R13/6592
CPC分类号： H01R13/6592 , H01B7/0208 , H01B7/0823 , H01R12/79 , H01R13/65912
摘要： A shielded flat cable includes a first differential signal line pair including mutually parallel first and second signal lines, first and second ground lines parallel to the first differential signal line pair arranged between the first and second ground lines, an insulating layer covering the first differential signal line pair, the first and second ground lines, a first shielding layer covering a first surface of the insulating layer, and a second shielding layer covering a second surface of the insulating layer, opposite to the first surface. The insulating layer includes an opening exposing the first ground line at the first surface of the insulating layer, and the first shielding layer is electrically connected to the first ground line through the opening. A width of the first ground line is greater than a width of each of the first and second signal lines.
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公开(公告)号：US12016132B2
公开(公告)日：2024-06-18
申请号：US17041158
申请日：2019-03-27
发明人： Kayo Hashizume , Masamichi Yamamoto
CPC分类号： H05K3/382 , H05K1/03 , H05K2201/032 , H05K2203/095 , H05K2203/1131
摘要： A base material for a printed circuit board includes a base film having an insulating property, and a sintered body layer including metal particles and layered on at least one surface of the base film. The sintered body layer includes sintered particles that are derived from the metal particles and partially embedded into the surface of the base film. The embedment ratio of the sintered particles is greater than or equal to 10% and less than or equal to 90%.
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公开(公告)号：US11864312B2
公开(公告)日：2024-01-02
申请号：US17593573
申请日：2020-02-27
发明人： Hiroshi Ueda , Ippei Tanaka , Takashi Kasuga , Masamichi Yamamoto
CPC分类号： H05K1/0296 , H05K3/18 , H05K2201/09227 , H05K2203/0723
摘要： According to one aspect of the present disclosure, a printed circuit board includes: an insulating base film; and a plurality of wiring portions formed on a surface of the base film, wherein the wiring portions include a seed layer that is directly or indirectly layered on the surface of the base film and a metal layer that is layered on the seed layer, wherein the base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions, wherein the plurality of wiring portions include at least one outermost boundary wiring portion and a plurality of inner wiring portions other than the outermost boundary wiring portion, wherein the outermost boundary wiring portion is formed on an outermost side of the base film in the wiring area and at a boundary between the wiring area and the non-wiring area, wherein an average width of the outermost boundary wiring portion is 30 μm or more, wherein an average width of the inner wiring portions is 20 μm or less, and wherein an average aspect ratio of the inner wiring portions is 1.5 or more.
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