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公开(公告)号：US11064147B2
公开(公告)日：2021-07-13
申请号：US15880066
申请日：2018-01-25
Applicant: Sony Corporation
Inventor： Hiroshi Iwasa , Satoshi Ogata
IPC: H04N5/378 , H04N5/232 , H04N5/347 , H04N5/3745
Abstract: A solid-state image pickup device includes: comparators; counters; and a control portion for carrying out control in such a way that in a phase of an addition mode, the two comparators and the two counters corresponding to the two pixel columns, respectively, are set as a unit, 1 is added to a second digit of one counter of the two counters when both the comparison results from the two comparators has a first logic, 1 is added to a first digit of the one counter when one of the comparison results from the two comparators has the first logic, and 1 is added to none of the first digit and the second digit of the one counter when both the comparison results from the two comparators has a second logic.
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公开(公告)号：US09912895B2
公开(公告)日：2018-03-06
申请号：US14685074
申请日：2015-04-13
Applicant: SONY CORPORATION
Inventor： Hiroshi Iwasa , Satoshi Ogata
CPC classification number: H04N5/378 , H04N5/23232 , H04N5/347 , H04N5/37455
Abstract: A solid-state image pickup device includes: comparators; counters; and a control portion for carrying out control in such a way that in a phase of an addition mode, the two comparators and the two counters corresponding to the two pixel columns, respectively, are set as a unit, 1 is added to a second digit of one counter of the two counters when both the comparison results from the two comparators has a first logic, 1 is added to a first digit of the one counter when one of the comparison results from the two comparators has the first logic, and 1 is added to none of the first digit and the second digit of the one counter when both the comparison results from the two comparators has a second logic.
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公开(公告)号：US09712766B2
公开(公告)日：2017-07-18
申请号：US14858384
申请日：2015-09-18
Applicant: Sony Corporation
Inventor： Satoshi Ogata , Rei Yoshikawa , Hiroaki Ebihara
CPC classification number: H04N5/357 , H04N5/335 , H04N5/3742 , H04N5/3765 , H04N5/378
Abstract: A signal processing device includes a control unit that suspends supplying of a signal to an A/D conversion unit which performs A/D conversion, during an A/D conversion period in which the A/D conversion is performed on the signal that depends on an electric charge read from a pixel; and a maintenance unit that maintains a signal value of the signal in a state where the signal is supplied by the control unit to the A/D conversion unit and that supplies the maintained signal value to the A/D conversion unit in a state where the supplying of the signal to the A/D conversion unit is suspended by the control unit.
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Patent Agency Ranking
4.发明授权Signal processing device and method, imaging device and solid state imaging element 有权信号处理装置和方法，成像装置和固态成像元件公开(公告)号：US09160940B2
公开(公告)日：2015-10-13
申请号：US13847551
申请日：2013-03-20
Applicant: Sony Corporation
Inventor： Satoshi Ogata , Rei Yoshikawa , Hiroaki Ebihara
CPC classification number: H04N5/357 , H04N5/335 , H04N5/3742 , H04N5/3765 , H04N5/378
Abstract: A signal processing device includes a control unit that suspends supplying of a signal to an A/D conversion unit which performs A/D conversion, during an A/D conversion period in which the A/D conversion is performed on the signal that depends on an electric charge read from a pixel; and a maintenance unit that maintains a signal value of the signal in a state where the signal is supplied by the control unit to the A/D conversion unit and that supplies the maintained signal value to the A/D conversion unit in a state where the supplying of the signal to the A/D conversion unit is suspended by the control unit.
Abstract translation: 一个信号处理装置包括一个控制单元，该控制单元在A / D转换周期内暂停向执行A / D转换的A / D转换单元提供信号，该A / D转换周期对依赖于 从像素读取的电荷; 以及维护单元，其在由所述控制单元向所述A / D转换单元提供所述信号的状态下维持所述信号的信号值，并且将所述维持信号值提供给所述A / D转换单元，其状态是 控制单元暂停将信号提供给A / D转换单元。
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5.发明申请公开(公告)号：US20180249108A1
公开(公告)日：2018-08-30
申请号：US15880066
申请日：2018-01-25
Applicant: Sony Corporation
Inventor： Hiroshi Iwasa , Satoshi Ogata
IPC: H04N5/378 , H04N5/347 , H04N5/3745 , H04N5/232
CPC classification number: H04N5/378 , H04N5/23232 , H04N5/347 , H04N5/37455
Abstract: A solid-state image pickup device includes: comparators; counters; and a control portion for carrying out control in such a way that in a phase of an addition mode, the two comparators and the two counters corresponding to the two pixel columns, respectively, are set as a unit, 1 is added to a second digit of one counter of the two counters when both the comparison results from the two comparators has a first logic, 1 is added to a first digit of the one counter when one of the comparison results from the two comparators has the first logic, and 1 is added to none of the first digit and the second digit of the one counter when both the comparison results from the two comparators has a second logic.
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公开(公告)号：US20210377476A1
公开(公告)日：2021-12-02
申请号：US17354424
申请日：2021-06-22
Applicant: Sony Corporation
Inventor： Hiroshi Iwasa , Satoshi Ogata
IPC: H04N5/378 , H04N5/232 , H04N5/347 , H04N5/3745
Abstract: A solid-state image pickup device includes: comparators; counters; and a control portion for carrying out control in such a way that in a phase of an addition mode, the two comparators and the two counters corresponding to the two pixel columns, respectively, are set as a unit, 1 is added to a second digit of one counter of the two counters when both the comparison results from the two comparators has a first logic, 1 is added to a first digit of the one counter when one of the comparison results from the two comparators has the first logic, and 1 is added to none of the first digit and the second digit of the one counter when both the comparison results from the two comparators has a second logic.
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公开(公告)号：US20160014355A1
公开(公告)日：2016-01-14
申请号：US14858384
申请日：2015-09-18
Applicant: Sony Corporation
Inventor： Satoshi Ogata , Rei Yoshikawa , Hiroaki Ebihara
CPC classification number: H04N5/357 , H04N5/335 , H04N5/3742 , H04N5/3765 , H04N5/378
Abstract: A signal processing device includes a control unit that suspends supplying of a signal to an A/D conversion unit which performs A/D conversion, during an A/D conversion period in which the A/D conversion is performed on the signal that depends on an electric charge read from a pixel; and a maintenance unit that maintains a signal value of the signal in a state where the signal is supplied by the control unit to the A/D conversion unit and that supplies the maintained signal value to the A/D conversion unit in a state where the supplying of the signal to the A/D conversion unit is suspended by the control unit.
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8.发明申请SIGNAL PROCESSING DEVICE AND METHOD, IMAGING DEVICE AND SOLID STATE IMAGING ELEMENT 有权信号处理装置和方法，成像装置和固态成像元件公开(公告)号：US20130286265A1
公开(公告)日：2013-10-31
申请号：US13847551
申请日：2013-03-20
Applicant: SONY CORPORATION
Inventor： Satoshi Ogata , Rei Yoshikawa , Hiroaki Ebihara
IPC: H04N5/335
CPC classification number: H04N5/357 , H04N5/335 , H04N5/3742 , H04N5/3765 , H04N5/378
Abstract: A signal processing device includes a control unit that suspends supplying of a signal to an A/D conversion unit which performs A/D conversion, during an A/D conversion period in which the A/D conversion is performed on the signal that depends on an electric charge read from a pixel; and a maintenance unit that maintains a signal value of the signal in a state where the signal is supplied by the control unit to the A/D conversion unit and that supplies the maintained signal value to the A/D conversion unit in a state where the supplying of the signal to the A/D conversion unit is suspended by the control unit.
Abstract translation: 一个信号处理装置包括一个控制单元，该控制单元在A / D转换周期内暂停向执行A / D转换的A / D转换单元提供信号，该A / D转换周期对依赖于 从像素读取的电荷; 以及维护单元，其在由所述控制单元向所述A / D转换单元提供所述信号的状态下维持所述信号的信号值，并且将所述维持信号值提供给所述A / D转换单元，其状态是 控制单元暂停将信号提供给A / D转换单元。
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