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公开(公告)号:US11769436B2
公开(公告)日:2023-09-26
申请号:US17589997
申请日:2022-02-01
发明人: Wonseok Kim , Woonyoung Lee , Yeongshin Jang
IPC分类号: G09G3/20
CPC分类号: G09G3/20 , G09G2310/0275 , G09G2310/08 , G09G2330/021
摘要: A display apparatus including a display driving circuit and a display panel is provided. The display driving circuit, connected to a display panel including a plurality of pixel groups, includes a controller configured to determine a driving order of each of the plurality of pixel groups in a first horizontal period and to generate image data and a selection signal in a first voltage range, a data driver configured to generate an image signal on the basis of the image data and to transfer the image signal to the plurality of data lines in the first horizontal period, a plurality of output pads respectively connected to the plurality of pixel groups through the plurality of data lines, and a data switching circuit configured to provide the image signal to the display panel through at least one of the plurality of output pads based on the selection signal.
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公开(公告)号:US11244632B2
公开(公告)日:2022-02-08
申请号:US17026639
申请日:2020-09-21
发明人: Jeeyeon Eom , Soonchan Kwon , Kyungjik Min , Yeongshin Jang , Jeonghoon Choi , Siwoo Kim , Jaeyoun Lee
IPC分类号: G09G3/00 , G09G3/3275 , G09G3/3258
摘要: A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.
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公开(公告)号:US20230335040A1
公开(公告)日:2023-10-19
申请号:US18083055
申请日:2022-12-16
发明人: Chanbong YU , Yeongshin Jang , Woonyoung Lee
IPC分类号: G09G3/20
CPC分类号: G09G3/2096 , G09G2310/0291 , G09G2320/0276 , G09G2310/08 , G09G2330/028
摘要: A display driver is provided. The display driver includes: a plurality of source amplifiers connected to a plurality of source lines of a display panel, wherein one of the plurality of source amplifiers includes an input stage and an output stage configured to output a grayscale voltage to a source line of the plurality of source lines; and a decoder circuit configured to provide at least one of a plurality of gamma voltages to the input stage based on image data. The output stage includes a plurality of unit circuits connected to each other in parallel between the input stage and an output pad connected to the source line. Each of the plurality of unit circuits includes a buffer switch and an output buffer connected to the input stage, and is connected to the output pad through a resistor.
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公开(公告)号:US11721262B2
公开(公告)日:2023-08-08
申请号:US17745246
申请日:2022-05-16
发明人: Jeeyeon Eom , Jeonghoon Choi , Yeongshin Jang , Youngbae Moon , Woonyoung Lee
IPC分类号: G09G3/20
CPC分类号: G09G3/20 , G09G2300/0413 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2330/08
摘要: Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.
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