公开(公告)号：US20230120252A1

公开(公告)日：2023-04-20

申请号：US17735158

申请日：2022-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： TAE HWAN KIM ,  HYUNG GIL BAEK ,  YOUNG-JA KIM ,  KANG GYUNE LEE ,  SANG-WON LEE ,  YONG KWAN LEE

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor package may include; a first substrate, a first semiconductor chip disposed on the first substrate, an interposer disposed on the first semiconductor chip, a connecter spaced apart from the first semiconductor chip in a first horizontal direction and extending between the first substrate and the interposer, wherein the connecter directly electrically connects the first substrate and the interposer, a capacitor disposed between the connecter and the first semiconductor chip, and a guide pattern including a first guide portion and an opposing second guide portion spaced apart in the first horizontal direction, wherein the first guide portion is disposed between the connecter and the capacitor, the second guide portion is disposed between the capacitor and the first semiconductor chip, and at least part of the capacitor is inserted between the first guide portion and the second guide portion.