公开(公告)号：US20170098624A1

公开(公告)日：2017-04-06

申请号：US15277339

申请日：2016-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwanyeob CHAE ,  Sanghoon JOO ,  Jong-Ryun CHOI ,  Jin-Ho CHOI

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/58

CPC classification number: H01L25/0657 ,  H01L23/50 ,  H01L23/5221 ,  H01L23/5286 ,  H01L23/585 ,  H01L23/60 ,  H01L24/02 ,  H01L24/05 ,  H01L24/06 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/0233 ,  H01L2224/0235 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06555 ,  H01L2924/00012

Abstract: A semiconductor chip including a plurality of input/output units includes: a plurality of additional pads disposed on a surface of the semiconductor chip, wherein the plurality of additional pads include at least one of a first additional pad to which a ground voltage is applied and a second additional pad to which a power supply voltage is applied; and a plurality of pads disposed on the surface of the semiconductor chip, wherein the plurality of pads include at least one of a first pad to which the ground voltage is applied and a second pad to which the power supply voltage is applied, and further include a third pad through which a signal is input and/or output. The at least one of the first additional pad and the second additional pad is disposed on an input/output unit where the third pad is disposed, among the plurality of input/output units.

公开(公告)号：US20190043841A1

公开(公告)日：2019-02-07

申请号：US16157642

申请日：2018-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYEOB CHAE ,  Sanghoon JOO ,  Jong-Ryun CHOI ,  Jin-Ho CHOI

IPC: H01L25/065 ,  H01L23/58 ,  H01L23/60 ,  H01L23/00 ,  H01L23/50

Abstract: A semiconductor chip including a plurality of input/output units includes: a plurality of additional pads disposed on a surface of the semiconductor chip, wherein the plurality of additional pads include at least one of a first additional pad to which a ground voltage is applied and a second additional pad to which a power supply voltage is applied; and a plurality of pads disposed on the surface of the semiconductor chip, wherein the plurality of pads include at least one of a first pad to which the ground voltage is applied and a second pad to which the power supply voltage is applied, and further include a third pad through which a signal is input and/or output. The at least one of the first additional pad and the second additional pad is disposed on an input/output unit where the third pad is disposed, among the plurality of input/output units.