-
公开(公告)号:US20140164688A1
公开(公告)日:2014-06-12
申请号:US14089961
申请日:2013-11-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KI-TAE LEE , SANG-HWA JIN , SANG-JONG KIM
IPC: G11C7/10
CPC classification number: G06F12/08 , G06F12/1027 , G06F2212/171 , G06F2212/214
Abstract: A SOC system includes a central processing unit; a memory management unit receiving a virtual address from the central processing unit and converting the virtual address into a physical address; a main memory implemented by a volatile memory and directly accessed through the physical address converted by the memory management unit; and a storage implemented by a nonvolatile memory separate from the main memory and including a first area directly accessed through the physical address converted by the memory management unit.
Abstract translation: SOC系统包括中央处理单元; 存储器管理单元,从所述中央处理单元接收虚拟地址,并将所述虚拟地址转换成物理地址; 由易失性存储器实现并通过由存储器管理单元转换的物理地址直接访问的主存储器; 以及由与主存储器分离的非易失性存储器实现的存储器,并且包括通过由存储器管理单元转换的物理地址直接访问的第一区域。
-
2.
公开(公告)号:US20240045592A1
公开(公告)日:2024-02-08
申请号:US18312817
申请日:2023-05-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: SANG-HWA JIN , MIN-HO KIM , DONGOUK MOON , SOO-YOUNG JI
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0679 , G06F3/064 , G06F3/0658
Abstract: A computational storage device includes a control module, and a nonvolatile memory connected to the control module. The nonvolatile memory is configured to store a plurality of graph data elements, which comprises a plurality of nodes and a plurality of edges that connect at least a portion of the plurality of nodes to each other, in a first memory area and a second memory area each having a plurality of blocks and having different read speeds. The control module is configured to store a first graph data element of the plurality of graph data elements having a relatively high degree of association with one node of the plurality of nodes in the first memory area, and store a second graph data element of the plurality of graph data elements having a relatively low degree of association with the one node of the plurality of nodes in the second memory area.
-
公开(公告)号:US20250053340A1
公开(公告)日:2025-02-13
申请号:US18776927
申请日:2024-07-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SANG-HWA JIN
IPC: G06F3/06
Abstract: A storage device includes a nonvolatile memory device and a storage controller configured to control the nonvolatile memory device under control of a plurality of hosts. The storage controller includes a plurality of physical functions, respectively corresponding to the plurality of hosts, and a real-time manager configured to control the plurality of physical functions based on real-time information of a real-time command when the real-time command is issued from at least one host among the plurality of hosts.
-
4.
公开(公告)号:US20250044942A1
公开(公告)日:2025-02-06
申请号:US18922592
申请日:2024-10-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: SANG-HWA JIN , MIN-HO KIM , DONGOUK MOON , SOO-YOUNG JI
IPC: G06F3/06
Abstract: A computational storage device includes a control module, and a nonvolatile memory connected to the control module. The nonvolatile memory is configured to store a plurality of graph data elements, which comprises a plurality of nodes and a plurality of edges that connect at least a portion of the plurality of nodes to each other, in a first memory area and a second memory area each having a plurality of blocks and having different read speeds. The control module is configured to store a first graph data element of the plurality of graph data elements having a relatively high degree of association with one node of the plurality of nodes in the first memory area, and store a second graph data element of the plurality of graph data elements having a relatively low degree of association with the one node of the plurality of nodes in the second memory area.
-
公开(公告)号:US20230384944A1
公开(公告)日:2023-11-30
申请号:US18135141
申请日:2023-04-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: SEUNGHAN LEE , SUNG CHUL HUR , BRIANMYUNGJUNE JUNG , SANG-HWA JIN
CPC classification number: G06F3/0619 , G06F1/30 , G06F3/0652 , G06F3/0673
Abstract: A storage system includes a host, a back plane including a switching block and connected to the host, a plurality of storage sets connected to the back plane to receive power from the host, and a battery module connected to the back plane to supply spare power to at least one storage set of the plurality of storage sets through the switching block, when an abnormal power drop is detected in the at least one storage set of the plurality of storage sets. The battery module controls the at least one storage set to perform a data flushing operation, when power less than or equal to a threshold value is detected in the at least one storage set after supplying the spare power.
-
-
-
-