公开(公告)号：US20160134307A1

公开(公告)日：2016-05-12

申请号：US14640005

申请日：2015-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chaohong HU ,  Hongzhong ZHENG ,  Prashant Jayaprakash NAIR

IPC: H03M13/29 ,  G11C29/52 ,  G06F11/10

CPC classification number: G11C29/52 ,  G06F11/1048 ,  G11C2029/0411 ,  H03M13/19

Abstract: In an Error Correction Code (ECC)-based memory, a Single Error Correction Double Error Detection (SECDED) scheme is used with data aggregation to correct more than one error in a memory word received in a memory burst. By completely utilizing the Hamming distance of the SECDED (128,120) code, 8 ECC bits can potentially correct one error in 120 data bits. Each memory burst is effectively “expanded” from its actual 64 data bits to 120 data bits by “sharing” additional 56 data bits from all of the other related bursts. When a cache line of 512 bits is read, the SECDED (128,120) code is used in conjunction with all the received 64 ECC bits to correct more than one error in the actual 64 bits of data in a memory word. The data mapping of the present disclosure translates to a higher rate of error correction than the existing (72,64) SECDED code.

Abstract translation: 在基于纠错码（ECC）的存储器中，使用单纠错双重错误检测（SECDED）方案进行数据聚合，以校正存储器突发中接收的存储器字中的多于一个错误。 通过完全利用SECDED（128,120）码的汉明距离，8个ECC位可以潜在地纠正120个数据位中的一个错误。 每个存储器突发通过从所有其他相关突发中“共享”附加的56个数据位，从其实际的64个数据位被有效地“扩展”到120个数据位。 当读取512位的高速缓存行时，SECDED（128,120）代码与所有接收的64个ECC位结合使用，以校正存储器字中实际64位数据中的多于一个错误。 本公开的数据映射转化为比现有（72,64）SECDED代码更高的纠错率。