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公开(公告)号:US20170060788A1
公开(公告)日:2017-03-02
申请号:US14959773
申请日:2015-12-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Mu-Tien CHANG , Hongzhong ZHENG , Liang YIN
CPC classification number: G06F13/1668 , G06F13/4068
Abstract: A memory system includes a master controller, an interface with a host computer, and a link bus configured to couple with a slave controller. The master controller includes an address mapping decoder, a transaction queue, and a scheduler. The address mapping decoder is configured to decode address mapping information of a memory device coupled to the slave controller. The scheduler of the master controller is configured to reorder memory transaction requests received from the host computer in the transaction queue using the address mapping information of the memory device. The memory system employs an extended open page policy based on the pending memory transaction requests in the transaction queue of the master controller.
Abstract translation: 存储器系统包括主控制器,与主计算机的接口以及被配置为与从属控制器耦合的链路总线。 主控制器包括地址映射解码器,事务队列和调度器。 地址映射解码器被配置为解码耦合到从控制器的存储器件的地址映射信息。 主控制器的调度器被配置为使用存储器设备的地址映射信息来重新排序从事务队列中的主计算机接收的存储器事务请求。 存储器系统基于主控制器的事务队列中的待处理存储器事务请求采用扩展的打开页面策略。
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公开(公告)号:US20220276955A1
公开(公告)日:2022-09-01
申请号:US17744615
申请日:2022-05-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Liang YIN
IPC: G06F12/00 , G11C5/14 , G06F1/3234 , G06F1/3225
Abstract: According to one general aspect, an apparatus may include a memory module. The memory module may include a plurality of memory banks configured to store data. The memory module may include a plurality of memory bank power down controllers, each configured to place one or more respective memory bank(s) in a power down mode. The memory module may include a memory module command interface configured to receive a handshake command from a memory controller, wherein the handshake command comprises a command to remove an indicated memory bank from power down mode.
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公开(公告)号:US20170206031A1
公开(公告)日:2017-07-20
申请号:US15143500
申请日:2016-04-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Liang YIN
CPC classification number: G06F1/3275 , G06F1/3225 , G11C5/04 , G11C5/148 , Y02D10/14 , Y02D50/20
Abstract: According to one general aspect, an apparatus may include a memory module. The memory module may include a plurality of memory banks configured to store data. The memory module may include a plurality of memory bank power down controllers, each configured to place one or more respective memory bank(s) in a power down mode. The memory module may include a memory module command interface configured to receive a handshake command from a memory controller, wherein the handshake command comprises a command to remove an indicated memory bank from power down mode.
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