-
公开(公告)号:US12079146B2
公开(公告)日:2024-09-03
申请号:US17383056
申请日:2021-07-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeonghyeon Cho , Yongsuk Kwon , Kyungsoo Kim , Jonghoon Kim , Jonghyun Seok , Jonggeon Lee
IPC: H05K1/02 , G06F1/20 , G06F1/30 , G06F13/12 , G06F13/16 , G06F13/364 , G06F13/40 , G11C5/04 , G11C5/06 , G11C7/10 , H05K1/14 , H05K1/16 , H05K1/18 , H05K3/36 , H05K7/02 , H05K7/20
CPC classification number: G06F13/1673 , G06F13/4068 , G06F13/409 , G11C5/06 , G11C7/1063
Abstract: A memory module includes a memory substrate including a main connector and an auxiliary connector, configured to be connected to an external device; and a plurality of memory chips mounted on at least one of a first surface or a second surface of the memory substrate, wherein the main connector is disposed on one side of the memory substrate, and the auxiliary connector is disposed on the second surface of the memory substrate.
-
公开(公告)号:US11844176B2
公开(公告)日:2023-12-12
申请号:US17672979
申请日:2022-02-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jonghyun Seok , Kyeongseon Park
IPC: H05K1/11
CPC classification number: H05K1/111 , H05K2201/09409
Abstract: A printed circuit board includes: a base substrate; a pad region having a plurality of pad patterns disposed on one surface of the base substrate; and a dummy region having a plurality of conductive dummy patterns separated from the plurality of pad patterns to be disposed on the one surface of the base substrate. The pad region includes a first edge region, and a second edge region disposed in a diagonal direction of the first edge region on the one surface of the base substrate. The dummy region includes a third edge region, and a fourth edge region disposed in a diagonal direction of the third edge region on the one surface of the base substrate.
-
公开(公告)号:US12219703B2
公开(公告)日:2025-02-04
申请号:US18503974
申请日:2023-11-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jonghyun Seok , Kyeongseon Park
IPC: H05K1/11
Abstract: A printed circuit board includes: a base substrate; a pad region having a plurality of pad patterns disposed on one surface of the base substrate; and a dummy region having a plurality of conductive dummy patterns separated from the plurality of pad patterns to be disposed on the one surface of the base substrate. The pad region includes a first edge region, and a second edge region disposed in a diagonal direction of the first edge region on the one surface of the base substrate. The dummy region includes a third edge region, and a fourth edge region disposed in a diagonal direction of the third edge region on the one surface of the base substrate.
-
-