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公开(公告)号：US20250120099A1
公开(公告)日：2025-04-10
申请号：US18736967
申请日：2024-06-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： MINWOO LEE , BYOUNGKON JO , DUK SUNG KIM , JOONHO JUN , DOOHEE HWANG
IPC: H10B80/00 , H01L25/065 , H01L25/18
Abstract: A memory device includes: first and second core dies that include a plurality of memory cells and are stacked in a first direction, and a buffer die that is stacked with the first and second core dies in the first direction and includes a first physical layer and a second physical layer, wherein the buffer die is configured to output data of the plurality of memory cells through the first physical layer, wherein the data of the plurality of memory cells is provided from the first and second core dies through through-vias that pass through the first and second core dies in the first direction, and wherein the second physical layer is separated from the first physical layer and is configured to receive power signals from outside.
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公开(公告)号：US20240427715A1
公开(公告)日：2024-12-26
申请号：US18588099
申请日：2024-02-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JOONHO JUN , Minwoo LEE , Byoungkon JO , Duksung KIM , Doohee HWANG
Abstract: An optical memory module includes a substrate, a first memory controller on the substrate, and a plurality of first memory devices on the substrate. The first memory controller includes the first transceiver. The first transceiver receives a first optical input signal through a first optical interconnection or outputs a first optical output signal through the first optical interconnection. The first memory controller is optically connected to an optical logic module located outside the optical memory module through the first transceiver and the first optical interconnection. The plurality of first memory devices are controlled by the first memory controller and accessed by the optical logic module through the first memory controller, the first transceiver and the first optical interconnection.
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