公开(公告)号：US12216935B2

公开(公告)日：2025-02-04

申请号：US17067698

申请日：2020-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyungjoon Park ,  Youngho Gong ,  Hyeonwu Kim ,  Seokwon Ahn

IPC: G06F3/06

Abstract: A method of operating a storage device that includes a nonvolatile memory device and a controller that controls an operation of the nonvolatile memory device includes issuing, by the controller, a first command to the nonvolatile memory device, reading, by the nonvolatile memory device, first data from a memory cell array into a page buffer of the nonvolatile memory device, in response to the first command, issuing, by the controller, a second command to the nonvolatile memory device, and outputting, by the nonvolatile memory device to the controller, in response to the second command, status information indicating whether a read operation according to the first command has been completed and second data obtained from the page buffer of the nonvolatile memory device.

公开(公告)号：US20240370262A1

公开(公告)日：2024-11-07

申请号：US18631461

申请日：2024-04-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seho Kim ,  Minji Park ,  Jihun Ham ,  Hyungjoon Park ,  Jinho Yi

IPC: G06F9/30 ,  G06F9/48

Abstract: A computing device is provided. The computing device includes: a memory configured to load an application program including a plurality of threads; a processor configured to concurrently execute threads that are in a first state, and to convert a thread, which completes processing of at least one task distributed among the plurality of threads, from among the plurality of threads, from the first state into a second state, wherein the first state corresponds to an activated state in which a thread processes the at least one task, and the second state corresponds to a wait state; and a thread management processor configured to set all of the plurality of threads to the first state based on all of the plurality of threads being in the second state.

公开(公告)号：US10783033B2

公开(公告)日：2020-09-22

申请号：US15981429

申请日：2018-05-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyungwoo Choi ,  Hyungjoon Park ,  Jinwoong Lee

IPC: G06F11/00 ,  G06F11/10 ,  G06F12/0804 ,  G11C29/52

Abstract: A computing device includes a main memory, a processor, and a cache. The main memory stores data and parity, for checking an error of the data, and sends and receives the data and parity with a reference size. The processor accesses the main memory, and the cache memory caches the data. If the processor requests a write operation for current data, the current data are stored to the cache memory and the cache memory changes the stored current data to the reference size and outputs the current data changed to the reference size to the main memory. A size of the current data is smaller than the reference size.