公开(公告)号：US11495320B2

公开(公告)日：2022-11-08

申请号：US17169643

申请日：2021-02-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heejong Kim ,  Gunbae Kim

IPC: G11C29/00 ,  G11C29/42 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30 ,  G11C29/12 ,  G11C29/44

Abstract: A storage device includes a power supply circuit that receives a power disable signal from a host device and provides a first internal voltage and a second internal voltage, a non-volatile memory including a memory device, and a storage controller that controls the non-volatile memory and includes a processor that performs a data recovery operation on data stored in the memory device and a host interface that communicates with the host device. When the power disable signal is activated at a power off time, the storage controller is powered off, the power supply circuit interrupts the first internal voltage and the second internal voltage during a reference time following the power off time, and provides the first internal voltage to the processor after the reference time has elapsed following the power off time.